Disable Cache L1 et L2 Armv8

Hi

I work with the ARMV8 architecture, I want to disactivate L1 cache ,

to disable the L1 cache I found in the user manual
"" The SCTLR.I bit enables or disables the L1 instruction cache. ""

my question here is: I did not find in the manual how to disable the L1 data cache, so how I can disable the L1 data cache?

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  • Hi

    thank you for your reply,
    can you explain me more please,
    in the doc of armV8 cortex A72, I found for the L1 instruction cache it must to disable the I bit of SCTLR register
    and to disable the L2 cache must Disable the C bit.

    I didn't understand how the C bit of register SCTLR can disable the L2 cache and the L1 data cache?

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