I'm currently working on an SCO (i.MX8QXP from NXP) containing an A-35 cluster (4 cores) with a L2 cache. Is there anyway to access the content of the L2 cache? Our current debugger, Trace32, told us that it's not possible to access the L2 cache. I would simply like to confirm this affirmation.
Cortex-A35 only supports direct access to L1 cache for debug purpose.
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