I need to make physical memory pages uncacheable, it seems that in armv7 (I am using arm cortex A9) there are some bits that determine the memory type. we have two level translations (so we have pgd and pte and we do not use pmd and pud). Based on the manual, bit C, B, and TEX of the second level translation table entry (which I considered it as pte in the kernel code) determine whether the memory page is cacheable or not, therefore by changing them, we can change cache ability.
pgd
pte
pmd
what I think I found useful is, pgprot_noncached() which I gave one specific virtual memory's "vma->vm_page_prot" as its argument, I did not see any changes in "pte" that I printed.
pgprot_noncached()
"vma->vm_page_prot"
"pte"
I am wondering I might need to use set_pte_ext() to set changes of memory type of that specific virtual memory area in page table entry (pte)?
set_pte_ext()
Want to know I am assuming all of these correctly or anyone has a similar experience?