Does Armv7-A have a write buffer?
If yes, when will the write buffer be drained and what's the purpose of write buffer?
What is the intention behind your questions? I guess the first one can be answered by reading the TRMs, right?
I know Armv4&v5 have write buffer. But I can not find any introduction about write buffer in cortex a TRMs, so I'm not sure if cortex a cores have write buffer too.
Hi Yang Wang,
If you look at e.g. the Cortex-A9 TRM, you will see the write buffers are mentioned:
"The data side of the L1 memory system has:
two 32-byte linefill buffers and one 32-byte eviction buffer
a 4-entry, 64-bit merging store buffer."
I think this is about store buffer not write buffer. Store buffer is mainly used to hold store operation to Cache after committed by Load Store Unit. Write buffer is used to hold store operation to main memory. I think the two are different.
The TRM mentions three types of buffers:
The last one is your write buffer.
It will merge writes from L/S unit to nearby memory locations.
It can be drained with a DSB.
Thank you very much.
I have another question. DMB is enough to drain store buffer, am I right?
DMB ensures ordering only.
It will not "wait" for the write buffer.
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