Dear Community,
since my Hardkernel Odroid U3 is now (most of all) good supported by the mainline kernel, I tried to build the "mali" driver for linux 4.2 and noticed that there is no 'legacy' method by using USING_DT=0.
Therefore I have to add an "gpu@" entry to the device tree, so the mali driver can find the GPU on my Samsung 4412 Prime SoC.
I read your example how to add the missing entry and also found this dt implimentation made for the r4p0 by Tobias Jakobi.
mali@13000000 { compatible = "arm,mali400-mp4"; #address-cells = <1>; #size-cells = <1>; shared-memory-size = <0x10000000>; /* Mali DVFS */ utilization-interval = <1000>; power-domains = <&pd_g3d>; status = "okay"; /* Propagate VPLL output clock to SCLK_G3D and ensure that the DIV_G3D * divider is 1. */ assigned-clocks = <&clock CLK_MOUT_G3D1>, <&clock CLK_MOUT_G3D>, <&clock CLK_FOUT_VPLL>, <&clock CLK_SCLK_G3D>; assigned-clock-parents = <&clock CLK_SCLK_VPLL>, <&clock CLK_MOUT_G3D1>; assigned-clock-rates = <0>, <0>, <533000000>, <533000000>; clocks = <&clock CLK_SCLK_G3D>, <&clock CLK_G3D>; clock-names = "sclk_g3d", "g3d"; reg = <0x13001000 0x200>, <0x13000000 0x100>, <0x13003000 0x100>, <0x13008000 0x1100>, <0x13004000 0x100>, <0x1300A000 0x1100>, <0x13005000 0x100>, <0x1300C000 0x1100>, <0x13006000 0x100>, <0x1300E000 0x1100>, <0x13007000 0x100>, <0x13012000 0x100>; reg-names = "l2", "gp", "gp_mmu", "pp_0", "pp_mmu_0", "pp_1", "pp_mmu_1", "pp_2", "pp_mmu_2", "pp_3", "pp_mmu_3", "dma"; interrupts = <0 127 0>, <0 122 0>, <0 123 0>, <0 118 0>, <0 124 0>, <0 119 0>, <0 125 0>, <0 120 0>, <0 126 0>, <0 121 0>; interrupt-names = "gp", "gp_mmu", "pp_0", "pp_mmu_0", "pp_1", "pp_mmu_1", "pp_2", "pp_mmu_2", "pp_3", "pp_mmu_3"; gpu-supply = <&buck4_reg>;
mali@13000000 {
compatible = "arm,mali400-mp4";
#address-cells = <1>;
#size-cells = <1>;
shared-memory-size = <0x10000000>;
/* Mali DVFS */
utilization-interval = <1000>;
power-domains = <&pd_g3d>;
status = "okay";
/* Propagate VPLL output clock to SCLK_G3D and ensure that the DIV_G3D
* divider is 1. */
assigned-clocks = <&clock CLK_MOUT_G3D1>, <&clock CLK_MOUT_G3D>, <&clock CLK_FOUT_VPLL>, <&clock CLK_SCLK_G3D>;
assigned-clock-parents = <&clock CLK_SCLK_VPLL>, <&clock CLK_MOUT_G3D1>;
assigned-clock-rates = <0>, <0>, <533000000>, <533000000>;
clocks = <&clock CLK_SCLK_G3D>, <&clock CLK_G3D>;
clock-names = "sclk_g3d", "g3d";
reg = <0x13001000 0x200>, <0x13000000 0x100>, <0x13003000 0x100>,
<0x13008000 0x1100>, <0x13004000 0x100>, <0x1300A000 0x1100>,
<0x13005000 0x100>, <0x1300C000 0x1100>, <0x13006000 0x100>,
<0x1300E000 0x1100>, <0x13007000 0x100>, <0x13012000 0x100>;
reg-names = "l2", "gp", "gp_mmu", "pp_0", "pp_mmu_0", "pp_1", "pp_mmu_1",
"pp_2", "pp_mmu_2", "pp_3", "pp_mmu_3", "dma";
interrupts = <0 127 0>, <0 122 0>, <0 123 0>, <0 118 0>, <0 124 0>,
<0 119 0>, <0 125 0>, <0 120 0>, <0 126 0>, <0 121 0>;
interrupt-names = "gp", "gp_mmu", "pp_0", "pp_mmu_0", "pp_1", "pp_mmu_1",
"pp_2", "pp_mmu_2", "pp_3", "pp_mmu_3";
gpu-supply = <&buck4_reg>;
So I 'converted' these most of these entries to fit your dt layout:
gpu@13000000 { compatible = "arm,mali-400", "arm,mali-utgard"; reg = <0x13000000 0x30000>; interrupts = <0 127 0>, <0 122 0>, <0 123 0>, <0 118 0>, <0 124 0>, <0 119 0>, <0 125 0>, <0 120 0>, <0 126 0>, <0 121 0>, <0 117 0>; interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1", "IRQPP2", "IRQPPMMU2", "IRQPP3", "IRQPPMMU3", "IRQPMU"; pmu_domain_config = <0x1 0x4 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2 0x0 0x0>; pmu_switch_delay = <0xff>; clocks = <&clock CLK_SCLK_G3D>, <&clock CLK_G3D>; clock-names = "mali_parent", "mali"; vdd_g3d-supply = <&buck4_reg>; };
gpu@13000000 { compatible = "arm,mali-400", "arm,mali-utgard";
reg = <0x13000000 0x30000>;
interrupts = <0 127 0>, <0 122 0>, <0 123 0>, <0 118 0>, <0 124 0>, <0 119 0>, <0 125 0>, <0 120 0>, <0 126 0>, <0 121 0>, <0 117 0>;
interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1", "IRQPP2", "IRQPPMMU2", "IRQPP3", "IRQPPMMU3", "IRQPMU";
pmu_domain_config = <0x1 0x4 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2 0x0 0x0>;
pmu_switch_delay = <0xff>;
clock-names = "mali_parent", "mali";
vdd_g3d-supply = <&buck4_reg>;
};
But during modprobe I get this on dmesg:
[ 359.340576] Mali<2>: Inserting Mali v600 device driver. [ 359.340627] Mali<2>: Compiled: Oct 22 2015, time: 23:12:22.[ 359.340666] Mali<2>: Driver revision: r5p0-01rel0-8edbaa0[ 359.340702] Mali<2>: mali_module_init() registering driver[ 359.341638] Mali<2>: mali_probe(): Called for platform device 13000000.gpu[ 359.342014] Mali<2>: Mali memory settings (shared: 0xFFFFFFFF)[ 359.342037] Mali<2>: Using device defined frame buffer settings (0x00000000@0x00000000)[ 359.342067] Mali<2>: Mali PM domain: Creating Mali PM domain (mask=0x00001000)[ 359.342114] Mali<2>: Mali PP: Creating Mali PP core: Mali_PP0[ 359.342153] Mali<2>: Mali PP: Base address of PP core: 0x13008000[ 359.343326] Mali: ERR: /source/mali/DX910/drivers/r5p0/src/devicedrv/mali/common/mali_pp.c[ 359.343346] mali_pp_reset_wait() 267 Mali PP: Failed to reset core Mali_PP0, rawstat: 0x00000000[ 359.343385] Mali: ERR: /source/mali/DX910/drivers/r5p0/src/devicedrv/mali/common/mali_kernel_core.c[ 359.343399] mali_parse_product_info() 167 Failed to create initial PP object[ 359.343429] Mali<2>: terminate_subsystems() called[ 359.343566] Mali: ERR: /source/mali/DX910/drivers/r5p0/src/devicedrv/mali/linux/mali_kernel_linux.c[ 359.343583] mali_probe() 507 mali_probe(): Failed to initialize Mali device driver.[ 359.343774] mali-utgard: probe of 13000000.gpu failed with error -14[ 359.344002] Mali: Mali device driver loaded
[ 359.340576] Mali<2>: Inserting Mali v600 device driver.
[ 359.340627] Mali<2>: Compiled: Oct 22 2015, time: 23:12:22.
[ 359.340666] Mali<2>: Driver revision: r5p0-01rel0-8edbaa0
[ 359.340702] Mali<2>: mali_module_init() registering driver
[ 359.341638] Mali<2>: mali_probe(): Called for platform device 13000000.gpu
[ 359.342014] Mali<2>: Mali memory settings (shared: 0xFFFFFFFF)
[ 359.342037] Mali<2>: Using device defined frame buffer settings (0x00000000@0x00000000)
[ 359.342067] Mali<2>: Mali PM domain: Creating Mali PM domain (mask=0x00001000)
[ 359.342114] Mali<2>: Mali PP: Creating Mali PP core: Mali_PP0
[ 359.342153] Mali<2>: Mali PP: Base address of PP core: 0x13008000
[ 359.343326] Mali: ERR: /source/mali/DX910/drivers/r5p0/src/devicedrv/mali/common/mali_pp.c
[ 359.343346] mali_pp_reset_wait() 267
Mali PP: Failed to reset core Mali_PP0, rawstat: 0x00000000
[ 359.343385] Mali: ERR: /source/mali/DX910/drivers/r5p0/src/devicedrv/mali/common/mali_kernel_core.c
[ 359.343399] mali_parse_product_info() 167
Failed to create initial PP object
[ 359.343429] Mali<2>: terminate_subsystems() called
[ 359.343566] Mali: ERR: /source/mali/DX910/drivers/r5p0/src/devicedrv/mali/linux/mali_kernel_linux.c
[ 359.343583] mali_probe() 507
mali_probe(): Failed to initialize Mali device driver.
[ 359.343774] mali-utgard: probe of 13000000.gpu failed with error -14
[ 359.344002] Mali: Mali device driver loaded
(This was actually what I get before adding IRQ_PMU. The new output just throws additional lines with errors about PMU, but I think we can start with these, isn't it?)
Do you have maybe more examples how to create this gpu entry? A better example which is specific for my Mali400-MP4 or even SoC?
It would be great if you could help getting my GPU working with the mali driver
PS: Here is the /proc/interrupts of the vendors 3.8.y kernel:
CPU0 CPU1 CPU2 CPU3 11: 0 0 0 0 max77686 rtc-alarm0 28: 3625399 2705490 1989068 1964778 GIC MCT 66: 0 0 0 0 GIC dma-pl330.2 67: 187354 0 0 0 GIC dma-pl330.0 68: 0 0 0 0 GIC dma-pl330.1 85: 371 0 0 0 GIC exynos4210-uart 89: 10 0 0 0 GIC mct_comp_irq 90: 152893 0 0 0 GIC s3c2440-i2c.0 91: 492 0 0 0 GIC s3c2440-i2c.1 93: 0 0 0 0 GIC s3c2440-i2c.3 97: 0 0 0 0 GIC s3c2440-i2c.7102: 35739125 0 0 0 GIC ehci_hcd:usb1, ohci_hcd:usb2103: 0 0 0 0 GIC s3c-hsotg107: 10380 0 0 0 GIC mmc0109: 75 0 0 0 GIC dw-mci121: 0 0 0 0 GIC drm_g2d123: 604531 0 0 0 GIC drm_mixer125: 72 0 0 0 GIC s3c2440-hdmiphy-i2c126: 26 0 0 0 GIC s5p-mfc150: 0 0 0 0 GIC Mali_PP0_MMU151: 0 0 0 0 GIC Mali_PP1_MMU152: 0 0 0 0 GIC Mali_PP2_MMU 153: 0 0 0 0 GIC Mali_PP3_MMU 154: 0 0 0 0 GIC Mali_GP_MMU 155: 74966 0 0 0 GIC Mali_PP0 156: 74963 0 0 0 GIC Mali_PP1 157: 74957 0 0 0 GIC Mali_PP2 158: 74954 0 0 0 GIC Mali_PP3 159: 97884 0 0 0 GIC Mali_GP 180: 0 0 0 0 COMBINER exynos-tmu 194: 0 0 0 0 COMBINER exynos-sysmmu.5 195: 0 0 0 0 COMBINER exynos-sysmmu.6 196: 0 0 0 0 COMBINER exynos-sysmmu.7 197: 0 0 0 0 COMBINER exynos-sysmmu.8 198: 0 0 0 0 COMBINER exynos-sysmmu.3 199: 0 0 0 0 COMBINER exynos-sysmmu.14 200: 0 0 0 0 COMBINER exynos-sysmmu.4 202: 0 0 0 0 COMBINER exynos-sysmmu.10 204: 0 0 0 0 COMBINER exynos-sysmmu.2 205: 0 0 0 0 COMBINER exynos-sysmmu.1 206: 0 0 0 0 COMBINER exynos-sysmmu.0 416: 2 0 0 0 exynos-eint max98090_interrupt 427: 1 0 0 0 exynos-eint KEY_POWER 430: 1 0 0 0 exynos-eint DEVICE_DETECT 434: 0 0 0 0 exynos-eint KEY_USER 441: 0 0 0 0 exynos-eint HOST_DETECT 442: 0 0 0 0 exynos-eint max77686-irq 447: 0 0 0 0 exynos-eint hdmi IPI0: 0 1 55 41 CPU wakeup interrupts IPI1: 0 0 0 0 Timer broadcast interrupts IPI2: 5268640 16511481 13345249 3560029 Rescheduling interrupts IPI3: 350 381 227 374 Function call interrupts IPI4: 77 79 384 307 Single function call interrupts IPI5: 0 0 0 0 CPU stop interrupts Err: 0
CPU0 CPU1 CPU2 CPU3
11: 0 0 0 0 max77686 rtc-alarm0
28: 3625399 2705490 1989068 1964778 GIC MCT
66: 0 0 0 0 GIC dma-pl330.2
67: 187354 0 0 0 GIC dma-pl330.0
68: 0 0 0 0 GIC dma-pl330.1
85: 371 0 0 0 GIC exynos4210-uart
89: 10 0 0 0 GIC mct_comp_irq
90: 152893 0 0 0 GIC s3c2440-i2c.0
91: 492 0 0 0 GIC s3c2440-i2c.1
93: 0 0 0 0 GIC s3c2440-i2c.3
97: 0 0 0 0 GIC s3c2440-i2c.7
102: 35739125 0 0 0 GIC ehci_hcd:usb1, ohci_hcd:usb2
103: 0 0 0 0 GIC s3c-hsotg
107: 10380 0 0 0 GIC mmc0
109: 75 0 0 0 GIC dw-mci
121: 0 0 0 0 GIC drm_g2d
123: 604531 0 0 0 GIC drm_mixer
125: 72 0 0 0 GIC s3c2440-hdmiphy-i2c
126: 26 0 0 0 GIC s5p-mfc
150: 0 0 0 0 GIC Mali_PP0_MMU
151: 0 0 0 0 GIC Mali_PP1_MMU
152: 0 0 0 0 GIC Mali_PP2_MMU
153: 0 0 0 0 GIC Mali_PP3_MMU
154: 0 0 0 0 GIC Mali_GP_MMU
155: 74966 0 0 0 GIC Mali_PP0
156: 74963 0 0 0 GIC Mali_PP1
157: 74957 0 0 0 GIC Mali_PP2
158: 74954 0 0 0 GIC Mali_PP3
159: 97884 0 0 0 GIC Mali_GP
180: 0 0 0 0 COMBINER exynos-tmu
194: 0 0 0 0 COMBINER exynos-sysmmu.5
195: 0 0 0 0 COMBINER exynos-sysmmu.6
196: 0 0 0 0 COMBINER exynos-sysmmu.7
197: 0 0 0 0 COMBINER exynos-sysmmu.8
198: 0 0 0 0 COMBINER exynos-sysmmu.3
199: 0 0 0 0 COMBINER exynos-sysmmu.14
200: 0 0 0 0 COMBINER exynos-sysmmu.4
202: 0 0 0 0 COMBINER exynos-sysmmu.10
204: 0 0 0 0 COMBINER exynos-sysmmu.2
205: 0 0 0 0 COMBINER exynos-sysmmu.1
206: 0 0 0 0 COMBINER exynos-sysmmu.0
416: 2 0 0 0 exynos-eint max98090_interrupt
427: 1 0 0 0 exynos-eint KEY_POWER
430: 1 0 0 0 exynos-eint DEVICE_DETECT
434: 0 0 0 0 exynos-eint KEY_USER
441: 0 0 0 0 exynos-eint HOST_DETECT
442: 0 0 0 0 exynos-eint max77686-irq
447: 0 0 0 0 exynos-eint hdmi
IPI0: 0 1 55 41 CPU wakeup interrupts
IPI1: 0 0 0 0 Timer broadcast interrupts
IPI2: 5268640 16511481 13345249 3560029 Rescheduling interrupts
IPI3: 350 381 227 374 Function call interrupts
IPI4: 77 79 384 307 Single function call interrupts
IPI5: 0 0 0 0 CPU stop interrupts
Err: 0
Regards
Thomas Pietrowski
Is it possible that you can send me some more examples for other devices?
* How the dt entry should look like (for dummies)
* How to setup the driver (is a custom MALI_PLATFORM needed?)
* etc.
Additionally, I really miss a full documentation of your driver. For example the Intel EMGD driver was horrible, as I had to upgrade Xserver and Mesa to a specific version depending on the libGL blob and had to vmalloc some memory to get libVA working, but I got all this info from the docs.
Or is there a download I missed so far about such a documentation?