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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3581 Questions
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  • Not Answered

    Interrupts from the secure world to the non-secure world. 0

    • iOS
    • TrustZone
    • Armv8-M
    18338 views
    11 replies
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    A question about interrupt priority degrade 0

    • Architecture
    • web
    • CHI
    • Security
    • Class
    • TrustZone
    • Armv8-M
    • Internet of Things (IoT)
    9141 views
    2 replies
    Latest over 7 years ago
    by Wenchuan2018
  • Answered

    How to use FreeRTOS Scheduler with trustZone ARMV8-M M33 ? +1

    • ACE
    • Security
    • Cortex-M
    • TrustZone
    • Armv8-M
    10893 views
    2 replies
    Latest over 7 years ago
    by Simon
  • Answered

    Behaviour of HREADYOUTS of ahb_to_ahb_apb_async IP +1

    • AMBA
    6231 views
    1 reply
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    CortexM3 : Issue when image start address is other than 0x0 +1

    • Cortex-M3
    • Cortex-M
    • C
    3217 views
    1 reply
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    debug mode with Keil ÎĽVision 5 +1

    • Keil MDK
    • Armv8-M
    2678 views
    1 reply
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    CortexM3 +1

    • Cortex-M3
    • Cortex-M
    6521 views
    7 replies
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    code is not working for optimization setting O2 and O3 for Arch64bit Cortex-A53 process +1

    • Cortex-A53
    • AArch64
    • Armv8-A
    • Cortex-A
    7058 views
    1 reply
    Latest over 7 years ago
    by Zhifei Yang
  • Answered

    ARMv7-A: Cache maintenance operation by VA, performance +1

    • Cache coherency
    • Cache
    • Cortex-A
    • Cortex-A8
    12618 views
    8 replies
    Latest over 7 years ago
    by MarekBykowski
  • Answered

    Raising priority of PendSV within NVIC when PendSV pending +1

    • Cortex-M7
    • Cortex-M
    • Cortex-M4
    6548 views
    1 reply
    Latest over 7 years ago
    by Vanhealsing
  • Answered

    Why should we call secure function in handler mode? +1

    • Keil MDK
    • Cortex-M23
    • Windows 10
    • ACE
    • Keil MDK Cortex-M Edition
    • GNU Arm
    • DS-5 Debugger
    • Fast Models
    • Cortex-M
    • TrustZone
    • Fixed Virtual Platforms (FVPs)
    • Debugging
    • Armv8-M
    • Windows
    • CMSIS
    • Linux
    8946 views
    2 replies
    Latest over 7 years ago
    by matt-ma
  • Not Answered

    When is Cortex-R5 Virtual Peripheral AXI bus used? 0

    • Cortex-R
    • AXI
    • Cortex-R5
    2450 views
    0 replies
    Started over 7 years ago
    by Etienne Alepins
  • Not Answered

    Hypervisor Mode to System Mode in R52 cortex 0

    • Cortex-R
    • Cortex-R5
    3236 views
    0 replies
    Started over 7 years ago
    by Himanshu Khanna
  • Not Answered

    Porting FreeRTOS On R-52 Cortex +1

    • Cortex-R52
    • Cortex-R
    • Real Time Operating System (RTOS)
    6685 views
    1 reply
    Latest over 7 years ago
    by Georgia James Arm Employee Badge
  • Answered

    Can we inspect contents of the return stack to get the call tree? +1

    • Cortex-R
    • Cortex-R5
    • C
    5013 views
    2 replies
    Latest over 7 years ago
    by Etienne Alepins
  • Answered

    How could I disable bl2 and start spe image when reset? 0

    • Keil MDK
    • ACE
    • Constant
    • SRAM
    • Arm Compiler
    • Keil
    • String
    • Thumb
    • MPI
    • TrustZone
    • Library
    • GNU
    • Armv8-M
    • Interface
    • Memory
    9091 views
    2 replies
    Latest over 7 years ago
    by matt-ma
  • Not Answered

    Feature Comparison ARM v8 series 0

    • Cortex-A72
    • Cortex-A57
    • Armv8-A
    • Cortex-A
    8191 views
    2 replies
    Latest over 7 years ago
    by techguyz
  • Answered

    Cortex-M23/M33 dynamic power +1

    • Cortex-M0
    • Cortex-M23
    • Cortex-M
    • TrustZone
    • Cortex-M33
    3689 views
    1 reply
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    aarch64 kernel using aarch32 page tables +2

    • Armv7-A
    • AArch64
    • AArch32
    7739 views
    2 replies
    Latest over 7 years ago
    by ashimida
  • Answered

    Looking for typical max frequency for Cortex-M CPUs 0

    • Cortex-M7
    • Cortex-M
    • Cortex-M4
    10911 views
    1 reply
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
<>
Topics being discussed in this forum
  • AArch64
  • AMBA
  • Arm Assembly Language (ASM)
  • Armv7-A
  • Armv8-A
  • Armv8-M
  • AXI
  • Cache
  • Cortex-A
  • Cortex-A53
  • Cortex-A7
  • Cortex-A8
  • Cortex-A9
  • Cortex-M
  • Cortex-M0
  • Cortex-M3
  • Cortex-M4
  • Cortex-M7
  • Cortex-R
  • Interrupt
  • Linux
  • Memory
  • Memory Management Unit (MMU)
  • NEON
  • TrustZone