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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
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  • Answered

    Invoking application from Hypervisor in ARM V8 +1

    • Armv8-A
    • Cortex-A
    3593 views
    1 reply
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    ELn configuration in ARMV8 +1

    • EL1
    • EL3
    • EL2
    • Linux
    3429 views
    1 reply
    Latest over 10 years ago
    by Peter Rielly Arm Employee Badge
  • Answered

    Reset Management Register Functioanlity in ARM v8 +1

    • Cortex-A57
    • AArch64
    • Cortex-A
    • AArch32
    5582 views
    2 replies
    Latest over 10 years ago
    by Peter Rielly Arm Employee Badge
  • Answered

    Trap control and instruction enable/disable in ARMv8 +1

    • EL2
    • NEON
    5118 views
    1 reply
    Latest over 10 years ago
    by Peter Rielly Arm Employee Badge
  • Answered

    System Error Interrupts in ARM V8 +1

    • EL1
    • Cache
    8439 views
    1 reply
    Latest over 10 years ago
    by Peter Rielly Arm Employee Badge
  • Answered

    Question on how to calculate the axi read time 0

    • AXI
    7944 views
    8 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    AXI Atomic Access 0

    • AXI
    11654 views
    2 replies
    Latest over 10 years ago
    by Deepak
  • Answered

    EL1 behavior when MMU is off 0

    • EL1
    • EL3
    • EL2
    4916 views
    1 reply
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    Difference between WFI and WFE +1

    36508 views
    2 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    Is there enough processing horsepower in the ARM1176 processor .... 0

    • Arm11
    4670 views
    2 replies
    Latest over 10 years ago
    by Paul Harbin
  • Answered

    Virtual Timers in ARM V8 +1

    • Hypervisor
    5978 views
    1 reply
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    Virtual Interrupts and usage in ARM V8 +1

    • EL1
    • EL0
    • Generic Interrupt Controller
    4945 views
    1 reply
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    Self Hosted Debug +1

    • Linux
    5055 views
    2 replies
    Latest over 10 years ago
    by techguyz
  • Answered

    Why in A64 the coprocessor is removed? 0

    • AArch64
    • NEON
    • AArch32
    7732 views
    3 replies
    Latest over 10 years ago
    by Mark Nicholson Arm Employee Badge
  • Answered

    Cortex M4 Unaligned access with STR single word access 0

    • Cortex-M
    • Cortex-M4
    9841 views
    7 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    A TCM problem 0

    • Arm11
    10795 views
    7 replies
    Latest over 10 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    How to trap Guest data aborts +1

    • EL1
    • EL2
    • Generic Interrupt Controller
    • Linux
    10056 views
    8 replies
    Latest over 10 years ago
    by armdev
  • Answered

    How to get Cortex m3 soft core +1

    • Cortex-M0
    • Cortex-M3
    • Cortex-M
    4033 views
    3 replies
    Latest over 10 years ago
    by Sadanand Gulwadi
  • Not Answered

    Can an ACE master have multiple write channels ? 0

    • ACE
    • AXI4
    3106 views
    2 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    ARM SPEC score. +1

    • Cortex-A15
    • Cortex-A
    4953 views
    2 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
<>
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