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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3592 Questions
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  • Not Answered

    FPU vs CPU load/store performance 0

    14158 views
    3 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    ordering of memory access (Cortex M0+) 0

    1771 views
    0 replies
    Started over 5 years ago
    by Tony5566
  • Not Answered

    Debug probes interoperability 0

    • Debugger
    2005 views
    0 replies
    Started over 5 years ago
    by Attila Várhelyi
  • Not Answered

    Support for NUMA in ARMv8? 0

    17382 views
    3 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Suggested Answer

    STM32F103C6 doesn't receive the complete data thorugh i2c as a slave with interrupt enabled, mantains SCL low after first data byte 0

    • Interrupt Handling
    5663 views
    2 replies
    Latest over 5 years ago
    by vra
  • Not Answered

    Cortex A9 - ACP slave outstanding read requests 0

    12177 views
    0 replies
    Started over 5 years ago
    by RazvanN
  • Not Answered

    Reading suggestions to start programming with STM32H747 like mcu, especially with GCC 0

    • Multiprocessor
    • Cortex-M7
    • multithreading
    • Cortex-M4
    5915 views
    5 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    Cortex A-35 cluster interference +1

    22153 views
    3 replies
    Latest over 5 years ago
    by Etienne Alepins
  • Not Answered

    Development Board with Trace Options 0

    • Trace
    1987 views
    1 reply
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    initialisation of DRAM ECC with Cortex A9 CPU 0

    17504 views
    4 replies
    Latest over 5 years ago
    by flongnos
  • Suggested Answer

    Cortex M33 Multicore Boot issue 0

    • Musca-A
    • GNU Arm
    • CoreLink SSE-200
    • Cortex-M33
    3196 views
    1 reply
    Latest over 5 years ago
    by Lica
  • Answered

    Cortex-M unintentional Flash Read-While-Write 0

    • Cortex-M7
    • Memory Protection Unit (MPU)
    • Cortex-M
    9793 views
    7 replies
    Latest over 5 years ago
    by Casey Davis
  • Answered

    How to speed up DSP processing using Cortex-M0+ 0

    • Cortex-M0
    • Digital Signal Processor (DSP)
    • Cortex-M0+
    • CMSIS
    8903 views
    5 replies
    Latest over 5 years ago
    by Andy Neil
  • Answered

    Does the processor frequency change when switching from secure to non secure domain? 0

    • Cortex-M23
    • TrustZone for Armv8-M
    4968 views
    5 replies
    Latest over 5 years ago
    by Zhifei Yang Arm Employee Badge
  • Answered

    Neoverse N1 microarchitecture ISA support 0

    • Security
    • Armv8-A
    • Microarchitecture
    17349 views
    3 replies
    Latest over 5 years ago
    by Zhifei Yang Arm Employee Badge
  • Not Answered

    Porting C code (using intrinsics) from Cortex-M to Cortex-A? 0

    • Cortex-A
    • Cortex-M
    19698 views
    9 replies
    Latest over 5 years ago
    by Christophe Favergeon Arm Employee Badge
  • Not Answered

    Development board with Cortex-A53? 0

    • Cortex-A53
    • Development Boards
    14440 views
    3 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Suggested Answer

    FVP MPS2 UART memory map 0

    4210 views
    3 replies
    Latest over 5 years ago
    by Ronan Synnott Arm Employee Badge
  • Not Answered

    Need more Insights on CFGMEMALIAS bits in Cortex-M55 0

    1583 views
    0 replies
    Started over 5 years ago
    by SachinKumar
  • Not Answered

    Is there any way to enforce padding between subroutines using the scatter file? 0

    • Cortex-M23
    • Arm Assembly Language (ASM)
    5471 views
    8 replies
    Latest over 5 years ago
    by Ghantaz
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