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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3592 Questions
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  • Answered

    Programming BRAM with JTAG--Help regarding knowledge source requested. 0

    • Cortex-M0
    • JTAG
    • SWD
    • Memory
    4618 views
    4 replies
    Latest over 5 years ago
    by Mezan1
  • Suggested Answer

    Programming FPGA Block RAM connected to Cortex-M0 using JTAG 0

    • Cortex-M0
    • Arm Assembly Language (ASM)
    5295 views
    4 replies
    Latest over 5 years ago
    by Mezan1
  • Not Answered

    Does DSB(SY) guarantee Write-combined write to be flushed? 0

    15434 views
    1 reply
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    Question about T3 and T4 encoding of B/Bcc (Branch) Instruction 0

    • Instruction Decode
    • Control Flow Instructions
    4622 views
    7 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Answered

    SPI hanging up 0

    4264 views
    4 replies
    Latest over 5 years ago
    by BDyi
  • Answered

    Is there a more efficient way to swap two bytes? 0

    8154 views
    9 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    Can I build a custom SingleBoardComputer like Raspberry PI 0

    • Open Source Projects
    16179 views
    4 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    Is this right? (NVIC Interrupts) 0

    3713 views
    4 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Answered

    Cortex-M0: How to switch from one program to another 0

    • Cortex-M0
    • Cortex-M
    46845 views
    21 replies
    Latest over 5 years ago
    by tony philipsson
  • Not Answered

    translation table APTable permission problem 0

    • Cortex-A57
    • Armv8-A
    • Linux
    29036 views
    23 replies
    Latest over 5 years ago
    by raks8877
  • Answered

    which is better for performance fetching instructions from flash or SRAM? 0

    5616 views
    4 replies
    Latest over 5 years ago
    by Andy Neil
  • Not Answered

    the linux kernel will be hung here as long as there are more than one core inside one cluster 0

    21644 views
    1 reply
    Latest over 5 years ago
    by Zhifei Yang Arm Employee Badge
  • Not Answered

    A72 Invalidate dirty cache line (DC IVAC) 0

    17941 views
    1 reply
    Latest over 5 years ago
    by Zhifei Yang Arm Employee Badge
  • Not Answered

    TrustZone- Confidential Computing- TEE 0

    20147 views
    3 replies
    Latest over 5 years ago
    by Zhifei Yang Arm Employee Badge
  • Not Answered

    Off-chip Memory integration with Cortex-M0 0

    • Cortex-M0
    • Cortex-M System Design Kit
    2559 views
    0 replies
    Started over 5 years ago
    by Mezan1
  • Not Answered

    Priority Drop and Deactivation Interrupts at EL2 0

    • Cortex-A35
    • GICv3/v4
    • Armv8-A
    • CoreLink GIC-500
    15881 views
    1 reply
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    Cortex-M3 System bus registration of instruction requests 0

    2778 views
    2 replies
    Latest over 5 years ago
    by Daniel Gutowski
  • Not Answered

    How is it possible to integrated/interfaced RTOS into ARM -Mx series ? 0

    • Real Time Operating Systems (RTOS)
    • Cortex-M
    3567 views
    2 replies
    Latest over 5 years ago
    by Mahesh Arm Employee Badge
  • Suggested Answer

    Nuvoton NUC029LAN error: #137: expression must be a modifiable lvalue 0

    5859 views
    1 reply
    Latest over 5 years ago
    by Andy Neil
  • Answered

    FPU version in cortex-R52 +1

    5953 views
    1 reply
    Latest over 5 years ago
    by Peter Rielly Arm Employee Badge
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