Arm Community
Arm Community
  • Site
  • User
  • Site
  • Search
  • User
Support forums
Support forums
Architectures and Processors forum
  • Jump...
  • Cancel
  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3590 Questions
Help a member

Have a question? If you can, please take a moment to also see if there is a question that you are able to answer.

  • Tags
  • RSS
  • More actions
  • Cancel
Other forums
  • AI forum

  • Architectures and Processors forum

  • Arm Development Platforms forum

  • Arm Development Studio forum

  • Arm Virtual Hardware forum

  • Automotive forum

  • Compilers and Libraries forum

  • Embedded and Microcontrollers forum

  • High Performance Computing (HPC) forum

  • Internet of Things (IoT) forum

  • Keil forum

  • Laptops and Desktops forum

  • Mobile, Graphics, and Gaming forum

  • Morello forum

  • Operating Systems forum

  • Servers and Cloud Computing forum

  • SoC Design and Simulation forum

  • SystemReady Forum

  • Suggested Answer

    Transactions sequencing by interconnect in ACE protocol 0

    3052 views
    1 reply
    Latest over 4 years ago
    by Christopher Tory Arm Employee Badge
  • Not Answered

    Cortex-M7 profiling counter 0

    1422 views
    0 replies
    Started over 4 years ago
    by Gofor_core
  • Not Answered

    Hi, I am new at arm processor. I need to perform possible kernel level optimizations to the code which I already have. Can anyone suggest the possible methods, Is it possible to access the physical memory directly at kernel level? will it help? 0

    2108 views
    2 replies
    Latest over 4 years ago
    by Hectors
  • Not Answered

    Corstone SSE-300 FVP simulator does not work 0

    • Cortex-M55
    • Arm Development Studio
    • Corstone SSE-300
    • Simulation Models
    • Fixed Virtual Platforms (FVPs)
    1421 views
    0 replies
    Started over 4 years ago
    by Sap1006
  • Answered

    Differences between Armv7 to Armv8? 0

    174752 views
    16 replies
    Latest over 4 years ago
    by CyLim
  • Not Answered

    arm assembly 0

    1842 views
    2 replies
    Latest over 4 years ago
    by teggi
  • Answered

    Behavior of DSB with early write acknowledgement device memory attribute 0

    • AArch64
    • Armv8-A
    • Cortex-A
    • Memory Architecture
    4749 views
    3 replies
    Latest over 4 years ago
    by a.surati
  • Answered

    Emulator for ARM Cortex m4 0

    • Cortex-M Platforms Software
    • Emulation & Virtualization
    • Cortex-M4
    • Test and Verification
    2348 views
    1 reply
    Latest over 4 years ago
    by 42Bastian Schick
  • Answered

    DWT's watchpoint exception can not be issued when interrupt is disabled 0

    2047 views
    2 replies
    Latest over 4 years ago
    by sword_i@sina.com
  • Not Answered

    Does TLB save level-1 page directory entries? +1

    • Arm11
    5459 views
    3 replies
    Latest over 4 years ago
    by Qualls
  • Not Answered

    Please fill in: 2021 ML on MCUs and DSPs (tinyML) Developer Survey 0

    • Machine Learning (ML)
    • Cortex-M
    1252 views
    0 replies
    Started over 4 years ago
    by Wen Chou Arm Employee Badge
  • Not Answered

    Unsupported exclusive Data Abort 0

    1574 views
    0 replies
    Started over 4 years ago
    by XNoOp
  • Not Answered

    Faultmask, Caches and startup code (a writeup). 0

    1115 views
    0 replies
    Started over 4 years ago
    by 42Bastian Schick
  • Not Answered

    Hard fault error after adding static library into STM32F205VET6 0

    • STM32 F2
    • Cortex-M3
    • 3 (HardFault)
    1841 views
    2 replies
    Latest over 4 years ago
    by AshishD
  • Suggested Answer

    Cotex M4 ---MPU. After I override a privilleged region, it seems the write permission can't be upgraded?what is wrong? 0

    1641 views
    2 replies
    Latest over 4 years ago
    by Lindaqiuqiu
  • Not Answered

    can the Cortex-R5 processor support Cross Trigger Interface (CTI)? 0

    1322 views
    0 replies
    Started over 4 years ago
    by chenyu
  • Not Answered

    Host compilations of code which include the CMSIS headers 0

    • GCC
    • CMSIS
    • Cortex-M4
    • Test and Validation
    2115 views
    2 replies
    Latest over 4 years ago
    by JWMISEU
  • Not Answered

    Is pre-compiled ARM9 libs able to run on an ARM11 chip 0

    • Arm9
    • Arm11
    6605 views
    6 replies
    Latest over 4 years ago
    by Aimeee
  • Not Answered

    Why I am getting hardfault when static library is added into the project? 0

    • STM32 F2
    1530 views
    1 reply
    Latest over 4 years ago
    by 42Bastian Schick
  • Not Answered

    How to stop coresight sink on CPU exception 0

    6051 views
    6 replies
    Latest over 4 years ago
    by Aimeee
<>
Topics being discussed in this forum
  • AArch64
  • AMBA
  • Arm Assembly Language (ASM)
  • Armv7-A
  • Armv8-A
  • Armv8-M
  • AXI
  • Cache
  • Cortex-A
  • Cortex-A53
  • Cortex-A7
  • Cortex-A8
  • Cortex-A9
  • Cortex-M
  • Cortex-M0
  • Cortex-M3
  • Cortex-M4
  • Cortex-M7
  • Cortex-R
  • Interrupt
  • Linux
  • Memory
  • Memory Management Unit (MMU)
  • NEON
  • TrustZone