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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3585 Questions
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  • Answered

    Cortex-A53 processor instruction cycles +1

    • Cortex-A53
    • Cortex-A
    30697 views
    8 replies
    Latest over 6 years ago
    by 42Bastian Schick
  • Not Answered

    Relocating the Vector table in Cortex - M0 0

    12140 views
    5 replies
    Latest over 6 years ago
    by Joseph Yiu Arm Employee Badge
  • Not Answered

    4-kbyte boundary space 0

    • AMBA
    • AXI4
    43663 views
    10 replies
    Latest over 6 years ago
    by Colin Campbell Arm Employee Badge
  • Not Answered

    Timer0 do not count at the theoretical frequency 0

    2652 views
    1 reply
    Latest over 6 years ago
    by 42Bastian Schick
  • Not Answered

    Cortex M1 only runs in debugger (using ARTIX-7) 0

    3457 views
    3 replies
    Latest over 6 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    Best ARM processor for a low power medical device +1

    • Cortex-M
    4874 views
    1 reply
    Latest over 6 years ago
    by Ben Walshe Arm Employee Badge
  • Answered

    Best Microbenchmark package for Arm Cortex-A9 +1

    16285 views
    1 reply
    Latest over 6 years ago
    by vstehle Arm Employee Badge
  • Answered

    Attempt to set Secure Privileged Mode in armv7 A8 (using am3358 BBB silicon)? 0

    • Armv7-A
    • Secure Transactions
    17125 views
    3 replies
    Latest over 6 years ago
    by _nobody_
  • Not Answered

    Context protection when calling a secure function(NSC) in a non-secure interrupt function 0

    19843 views
    10 replies
    Latest over 6 years ago
    by Yang Zhang
  • Answered

    Dual core cortex-m7 for security applications +2

    • Cortex-M7
    • Cortex-M
    6108 views
    3 replies
    Latest over 6 years ago
    by Joseph Yiu Arm Employee Badge
  • Not Answered

    TCM arbitration hazard: Considerations for Firmware 0

    • Cortex-R
    • Cortex-R5
    2215 views
    0 replies
    Started over 6 years ago
    by c0deface
  • Answered

    IRQ in c++ not redirecting correct address +1

    3305 views
    1 reply
    Latest over 6 years ago
    by 42Bastian Schick
  • Answered

    volatile variable position in the stack (ABI std) +1

    5410 views
    5 replies
    Latest over 6 years ago
    by 42Bastian Schick
  • Answered

    Synchronization of caches on ARMv8 0

    • Armv8-A
    18029 views
    2 replies
    Latest over 6 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    ARMCC V6.12 problem with simple std::queue +1

    3371 views
    1 reply
    Latest over 6 years ago
    by 42Bastian Schick
  • Not Answered

    SIMD-NEON Optimization on CortexA7or Cortex A57 0

    • SIMD and Vector Processing Instructions
    15871 views
    1 reply
    Latest over 6 years ago
    by br-dev
  • Answered

    How to Change the Non Secure VTOR (Cortex-M33) +1

    • TrustZone for Armv8-M
    • Trusted Execution Environment (TEE)
    • TrustZone
    • Cortex-M33
    • Armv8-M
    11573 views
    5 replies
    Latest over 6 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    Flushing all L1 & L2 caches under Linux (kernel space) - optimizing dma-mapping API 0

    • Cortex-A9
    • DMA Devices
    • Linux
    24997 views
    2 replies
    Latest over 6 years ago
    by eli.z
  • Answered

    What is the "Integer divide unit with support for operand-dependent early termination"? +1

    • Cortex-M
    • Cortex-M33
    4250 views
    1 reply
    Latest over 6 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    How to import C variable in an assembly code in a .s file +1

    • Cortex-M
    • Cortex-M0+
    • Arm Assembly Language (ASM)
    8338 views
    2 replies
    Latest over 6 years ago
    by Joseph Yiu Arm Employee Badge
<>
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