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SVC instruction execution inside the hard fault handler

Hello everyone,

Processor : Arm Cortex-m4

For an experiment, I purposely triggering hard fault exception, by making T-bit in Execution Program Status Register to 0. The program execution control reaches hard fault handler.

Inside the hard fault handler I was triggering SVC instruction using "__asm volatile ("SVC #0");". After executing this line, system goes reset.

May I know the reason.

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tobermory over 2 years ago in reply to Sudhu145 +2 verified

SVC from within a hard fault handler causes lockup on Cortex M cpus. I think the default behaviour on lockup is reset. I use Silabs EFM32 cpus, which have hardware options to not reset but simply stay...
Ronan Synnott over 2 years ago +1

It is hard to say just from the description above. Do you fix the T-bit (via debugger?) after the Hard Fault? Looking at similar cases I found, there were suggestions to set breakpoint on the entry of...
Sudhu145 over 2 years ago in reply to tobermory +1

Thank you for your input, it was really helpful.

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0 Sudhu145 over 2 years ago in reply to tobermory

Thank you for your input, it was really helpful.
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0 Sudhu145 over 2 years ago in reply to tobermory

Thank you for your input, it was really helpful.
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