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I'd like to know the behavior of WFE and WFI regarding pending interrupts that occur prior to these instructions, on 2 different Cortex profiles. In both cases, the goal is to ensure any incoming interrupt will cause a wake-up when interrupts are masked/disabled.
- With Cortex-M and PRIMASK=1, BASEPRI=0, and SEVONPEND=1, when is the Event latch/register is set or cleared for pending interrupts before a WFE? In other words, is it ok to always leave SEVONPEND set or should it only be set just prior to WFE?
- With Cortex-A and interrupts disabled (CPSR.I=1), will interrupts that become pending prior to a WFI prevent it from suspending execution or does the interrupt have to occur after the WFI instruction has been executed to cause a wake-up event?
Thanks in advance!
Hi Vatsalya,
Its a good explanation on WFI. I have one doubt regarding the Interrupts.
Even though if there are any pending interrupts while executing the WFI, the processor would enter the standby mode. Consider the case when CPSR.I is disabled WFI will just wakes up the processor and starts executing the next instruction from the PC, so at this point what about the pending interrupts?