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WFE/WFI and pending interrupts?

I'd like to know the behavior of WFE and WFI regarding pending interrupts that occur prior to these instructions, on 2 different Cortex profiles. In both cases, the goal is to ensure any incoming interrupt will cause a wake-up when interrupts are masked/disabled.

- With Cortex-M and PRIMASK=1, BASEPRI=0, and SEVONPEND=1, when is the Event latch/register is set or cleared for pending interrupts before a WFE? In other words, is it ok to always leave SEVONPEND set or should it only be set just prior to WFE?

- With Cortex-A and interrupts disabled (CPSR.I=1), will interrupts that become pending prior to a WFI prevent it from suspending execution or does the interrupt have to occur after the WFI instruction has been executed to cause a wake-up event?

Thanks in advance!

Top replies

Jeff Blais over 11 years ago in reply to Manyam +2 verified

The ARMv7-A/R TRM says: "The processor can remain in the WFI low-power state until it is reset, or it detects one of the following WFI wake-up events: • a physical IRQ interrupt, regardless of the...
Jeff Blais over 11 years ago in reply to Vatsalya Thakur +1

According to ARM Support: "For the Cortex-Ax processor based on ARMV7-A/R architecture, things become simple as they don’t have an interrupt controller inside, so a pending interrupt can cause the WFI...
Jeff Blais over 11 years ago +1

Regarding Cortex-M, according to ARM Support: "When the processor executes WFE instruction, it will check if the Event Register is set or not, if set, the WFE instruction clears the Event Register...