I'd like to know the behavior of WFE and WFI regarding pending interrupts that occur prior to these instructions, on 2 different Cortex profiles. In both cases, the goal is to ensure any incoming interrupt will cause a wake-up when interrupts are masked/disabled.
- With Cortex-M and PRIMASK=1, BASEPRI=0, and SEVONPEND=1, when is the Event latch/register is set or cleared for pending interrupts before a WFE? In other words, is it ok to always leave SEVONPEND set or should it only be set just prior to WFE?
- With Cortex-A and interrupts disabled (CPSR.I=1), will interrupts that become pending prior to a WFI prevent it from suspending execution or does the interrupt have to occur after the WFI instruction has been executed to cause a wake-up event?
Thanks in advance!
( When interrupts are disabled and then the WFI is executed.)
In Cortex A series WFI would be executed and the processor would enter the standby mode.
Interrupts which are pending would not prevent processor to suspend execution.
When the processor is in WFI and an interrupt occurs:This wakes up the processor and the processor jumps to the interrupt handler associated with that interrupt.
But when CPSR.I is disabled this just wakes up the processor and the processor starts executing the next instruction from the program counter.
Hi Vatsalya,
Its a good explanation on WFI. I have one doubt regarding the Interrupts.
Even though if there are any pending interrupts while executing the WFI, the processor would enter the standby mode. Consider the case when CPSR.I is disabled WFI will just wakes up the processor and starts executing the next instruction from the PC, so at this point what about the pending interrupts?
According to ARM Support:
"For the Cortex-Ax processor based on ARMV7-A/R architecture, things become simple as they don’t
have an interrupt controller inside, so a pending interrupt can cause the WFI instruction to
complete without suspending execution regardless the value of the CPISR.I bit."
It was also confirmed that a pending interrupt is considered a WFI wakeup event because any physical IRQ or FIQ interrupt that is signaled to the processor when WFI is executed will prevent the processor from suspending and will simply cause the next instruction to be executed.
Regarding Cortex-M, according to ARM Support:
"When the processor executes WFE instruction, it will check if the Event Register is set or not,
if set, the WFE instruction clears the Event Register, and then execute the instruction
following the WFE instruction. If cleared, the processor will enter low-power state."
"The Event Register can only be cleared by executing the WFE instruction, so it is not affected
even when all exceptions have been handled before a WFE instruction."
"In addition, you should note that the processor would not always enter sleep mode
with only one WFE instruction due to Event Register, and thus we recommend that the WFI
instruction is put in a conditional loop."
"Since an exception has been pending, the Event Register should be set until the first WFE
instruction is executed. The second WFE instruction should enable processor to enter low power
state if the Event Register is not set again by any events (or no events occur) when the second
WFE instruction is executed."
Therefore, the Event Register is set whenever a WFE wake-up event occurs (such as a pending interrupt when SEVONPEND is set) and is not cleared until WFE is executed.
Hi,
If all the interrupts are disabled and the processor is in WFI state, and now if interrupt occurs, will processor wake up?? and if so, does the processor start executing the next instruction from progam counter.?? Any links from ARM supporting the above information will be much helpful.
The ARMv7-A/R TRM says:
"The processor can remain in the WFI low-power state until it is reset, or it detects one of the following WFI wake-up
events:
• a physical IRQ interrupt, regardless of the value of the CPSR.I bit
• a physical FIQ interrupt, regardless of the value of the CPSR.F bit
..."
Therefore, an interrupt will wake up the processor from WFI whether it is masked or not.
As vatsalysa said above, after waking up, execution will be started at the next instruction if interrupts are disabled.
Hi, im not able to access the link you provided. im getting the error message that "Cannot view Document".
So can you please help me out.