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Operating Systems forum
The latest forum discussions for all Arm technology relating to Operating Systems (OS)
272
questions
UEFI variables from UEFI shell
2 months ago
Servers and Cloud Computing forum
The latest forum discussions about the Arm Servers and Cloud Computing ecosystem for cloud native edit to cloud application development and deployment.
101
questions
RE: ArmRAL: Wrong usage of k0 in LDPC rate matching
5 months ago
SoC Design and Simulation forum
The latest forum discussions for community-based support for System-on-Chip (SoC) and Arm simulation models.
707
questions
In CHI how the Slave side is giving the L-Credits to the Master Side
4 days ago
SystemReady Forum
The SystemReady forum covers all aspects of the Arm SystemReady compliance program, including associated specifications (BSA, SBSA, BBR), Architecture Compliance Suite (ACS) testing, and implementation considerations for pre-silicon and SystemReady bands.
15
questions
RE: How to run ARM ACS
4 months ago
恩智浦汽车电子MCU讨论区博
4
questions
RE: [TRK-KEA64使用经验分享] 开箱体验 亮瞎我的双眼
over 9 years ago
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Suggested Answer
STM32F407 - Flag RXNE of SPI is clear when i read. Sometimes is stack in waiting the flag.
0
Keil
Cortex-M4
STM32 F4
2994
views
1
reply
Latest
over 4 years ago
by
Andy Neil
Answered
Perf record
0
6074
views
2
replies
Latest
over 4 years ago
by
YHuerta
Not Answered
Are any other ways to exit Handler mode to Thread mode on Cortex M processors?
0
Armv7 Exception Model
Cortex-M3
Cortex-M
4163
views
4
replies
Latest
over 4 years ago
by
haupt29
Not Answered
Force get access to Cortex-M0 if SWDIO is disabled on startup.
0
Cortex-M0
SWD
2084
views
2
replies
Latest
over 4 years ago
by
YurySokolov
Not Answered
AXI VIP does not complete read burst
0
4315
views
1
reply
Latest
over 4 years ago
by
Colin Campbell
Answered
how many shader cores on G31/G52?
+1
OpenCL
Mali-G52 GPU
Bifrost
Mali-G31 GPU
6492
views
2
replies
Latest
over 4 years ago
by
bakhi
Answered
I have Keil board, MCBSTM32F400. I want to do SPI communication with it, from a device thru ADC, and pass the data to the controller. Pl mention how can I hook the device to the board?
0
5298
views
14
replies
Latest
over 4 years ago
by
Andy Neil
Suggested Answer
STM32F469_Quad_SPI.FLM
0
1148
views
2
replies
Latest
over 4 years ago
by
rkopsch
Answered
Break point at SWI handler
0
Arm9
5495
views
2
replies
Latest
over 4 years ago
by
Jones212
Answered
Question about performance between GL_ANY_SAMPLES_PASSED vs GL_ANY_SAMPLES_PASSED_CONSERVATIVE
+1
Android OpenGL ES
OpenGL ES 3.1
OpenGL ES
4255
views
1
reply
Latest
over 4 years ago
by
Peter Harris
Not Answered
Using of PID functions from arm_math.h
0
Library
1387
views
0
replies
Started
over 4 years ago
by
MDDW
Not Answered
Why have a IDAU/SAU when one has a MPC
0
2490
views
0
replies
Started
over 4 years ago
by
Chris Daniels
Answered
no jump instruction at 0000H C8051F390
0
1955
views
5
replies
Latest
over 4 years ago
by
Andy Neil
Answered
Current priority level of processor
0
Armv7-M
Cortex-M
Cortex-M4
10549
views
6
replies
Latest
over 4 years ago
by
WestfW
Not Answered
What VCS PLI commands are required for M0+ DSM use
0
Cortex-M0+
940
views
0
replies
Started
over 4 years ago
by
LanceFlake
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