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Ten Things to Know About big.LITTLE
Brian Jeff
As the adoption of Arm big.LITTLE processing spreads there are a number of common questions which have been raised. I'd like to use this blog to answer some of the more common queries.
September 11, 2013
What is AMBA 5 CHI and how does it help?
Bruce Mathewson
At last the time has finally come when I can talk about AMBA 5 - the next generation of Arm interface standard. So, what's new?
September 11, 2013
big.LITTLE in 64-bit
Brian Jeff
With the ARM Cortex-A50 series processors, ARM has introduced a "big" and "LITTLE" processor pair that is 64-bit capable. What does this mean for big.LITTLE software?
September 11, 2013
ARM Cortex-A53 — Who You callin' LITTLE?
Brian Jeff
I may only weigh in at just over half a square millimeter on die, but I can handle a heavy workload and I pack quite a processing punch, and frankly I'm tired of the lack of respect I get as a "LITTLE…
September 11, 2013
Configure AMBA Fast With Early Power, Performance & Area Tools
Guest Partner Blogger
Back in April, I wrote about how
Atrenta
- an
ARM Connected Community
Partner - was helping to tame the SoC design problem with early power, performance and area or
ePPA
technology. ePPA holds great promise…
September 11, 2013
Time Flies When You're Having Fun - big.LITTLE Technology Coming of Age
Alan Tringham
It's often said that as one gets older, time appears to pass faster and faster. As proof of that it seems only yesterday that I had a full head of hair and ARM launched
big.LITTLE
. In fact it's been…
September 11, 2013
Instant Replay of Your ARM Cortex-A Series Simulations and Emulations
Guest Partner Blogger
If you've watched any sporting event on television lately, you've seen the pressure put on referees and umpires. They have to make split-second decisions in real-time, having viewed ultra-high-speed action…
September 11, 2013
Squaring the circle - Optimizing power efficiency in a Cortex-A15 processor
Haydn Povey
It is entirely appropriate that
ARM will announce
technical details of its latest hard macro product, the
Cortex™-A15 MP4 Hard Macro
for TSMC 28HPM node at
COOL Chips XV
, the IEEE Symposium on Low…
September 11, 2013
Streamlining the migration to an ARM processor based platform
Chris Shore
Now available design strategies and documentation to ease the migration to an ARM platform - From one programmer to another. You could say I'm an "Acorn boy" - I cut my programming teeth on personal computers…
September 11, 2013
Using Cache Coherency to Verify the AMBA4 Protocol
Guest Partner Blogger
The Jasper User Group Meeting was held on November 8 & 9 and was full of presentations on the diverse ways that users are applying formal techniques — some in areas where never before thought possible…
September 11, 2013
big.LITTLE and AMBA 4 ACE keep your cache warm and avoid flushes
Neil Parris
Updated 29th October 2013High performance and power efficiency are critical to the latest mobile devices, and
AMBA® 4 ACE™
is a fundamental technology supporting ARM's
big.LITTLE proces…
September 11, 2013
Simplifying SoC's with Hard Macros - New solutions for old problems
Haydn Povey
At the
TSMC
Open Innovation Platform (OIP)
forum in San Jose this week Mike Inglis, the General Manager of the Processor Division at ARM, presented a keynote speech succinctly titled "Enabling Smart System…
September 11, 2013
Energy Efficiency and Air Conditioning - Part 1
Ashley Stevens
I've recently realized just how similar mechanical and electronic engineering are when it comes to energy conservation. You see, I've recently begun construction of an energy-efficient, Frank-Lloyd Wright…
September 11, 2013
Avoiding rush hour traffic jams in your SoC design
William Orme
Thank goodness for the new packetization, virtual networking and clock gating features of the
ARM CoreLink NIC-400
. I'm fed up with hearing about spurious comparisons between a single humungous crossbar…
September 11, 2013
Cache Coherency and Verification Seminar at DACNow Online!
Guest Partner Blogger
If you missed
DAC
, then you missed the seminar on cache coherency and verification of cache coherency given by
ARM
and
Jasper
. Learn how to overcome the typical challenges of capturing the intent, reviewing…
September 11, 2013
Elba - Bringing it all together
John Goodacre
In the previous three blogs (Parts
1
,
2
and
3
) I've outlined the background and key decisions involved in the development and implementation of the Elba testchip. Now we'll look at the final steps taken…
September 11, 2013
Elba - How do we know it works?
John Goodacre
In
part 1 of this blog
, I outlined the thought process behind the Elba program. Here I'll look at the implementation decisions for the project.In ARM there are various stages of maturity of a new processor…
September 11, 2013
Wouldn't it be interesting if we... - Giving Birth to "Elba"
John Goodacre
"Wouldn't it be interesting if we....". That's the way many step changes have started in ARM. In the next four blogs I'd like to take this opportunity to tell you about just one of those, we called it…
September 11, 2013
ARM Cortex-R processor. What is it good for?
Guest Partner Blogger
The answer is functional safety applications. At least, that's where
TI's
ARM® Cortex™-R
cores are utilized - in high performance, real-time microcontrollers. As many real-time…
September 11, 2013
Honey, SuVolta Deeply Depleted My Cortex-M0 Power!
Thomas Ensergueix
A wide variety of applications will be impacted by the massive trend which is broadly named as the "Internet of Things" (IoT). Even if some may consider this term as being overused, and newer marketing…
September 11, 2013
Cortex-M0+ a year after: smaller, thriftier and smarter!
Thomas Ensergueix
As usual it happened late on Friday afternoon. A couple of weeks ago a message arrived in my inbox from one of our latest
ARM® Cortex™-M0
+ partners: "We're using 90LP and a similar configuration…
September 11, 2013
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