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early burst termination - ahb - interconnect

the system have 2 masters - M0,M1, and 2 slaves- S0, S1.
M0 transmit to S0, INCR4 : NON,SEQ and then early burst termination and M1 transmit to S1 new burst.
In that clock cycle what S0 expects to see (in order to know  on early burst termination):
1. hsel HIGH  + htrans = IDLE.
2. hsel LOW