Hello,
I have a question on simple system as below : Two master and Two slave
For HREADYOUT at Slave, it's can extend "data phase" by "LOW" if can't provide or sample the data.
For HREADY at Master, it's drive by multiplexor, it's means that the transfer is not completed if HREADY is "LOW", and the transfer must be extend.
For slaves, what is the meaning of "HREADY" on address phase and data phase?
If Slave 1 is providing the data phase of last burst transfer of Master 1, and Master 1 is send new transfer to Slave 2 in same time.
But Slave 2 is serving Master 2 now(extend data phase), so "HREADY" is "LOW" on Slave 1 and Master 1? or HREADY, HTRANS, HADDR,... is share bus on Multi-Master AHB system, so this case is impossible?
Thanks a lot
I am not sure which version of AHB you are talking about. I guess it may be AHB2 as you mentioned multiple masters.
However, in case of AHB2, there is an arbiter which gives grant for each masters and only one master can be granted for bus access at the same time.
Sorry, I forget it
My AHB Version is AHB Lite