SoC Design and Simulation forum WID not present in AXI4

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WID not present in AXI4

Ravi V. over 6 years ago

can you clarify to me, why there is no WID in AXI4?

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Colin Campbell over 6 years ago +1 verified

WID is needed to support write data interleaving described in AXI3, but this isn't supported in AXI4, so no requirement to have a WID signal. See section A5.4.1 in the current AXI protocol spec for details...