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Why do we use only R0 & R1 in case of Indirect Addressing mode and why not any other GP registers? Can we use R0 & R1 of any bank or only Bank 0?
"Why do we use only R0 & R1 in case of Indirect Addressing mode and why not any other GP registers?"
We don't. We sometimes also use DPTR.
"Can we use R0 & R1 of any bank or only Bank 0?"
When selected, R0 & R1 also work in other register banks.
All the available instructions and addressing modes are fully documented in Chapter 2 of the so-called "bible" for the 8051:
Chapter 1 - 80C51 Family Architecture: www.nxp.com/.../80C51_FAM_ARCH_1.pdf
Chapter 2 - 80C51 Family Programmer's Guide and Instruction Set: www.nxp.com/.../80C51_FAM_PROG_GUIDE_1.pdf
Chapter 3 - 80C51 Family Hardware Description: www.nxp.com/.../80C51_FAM_HARDWARE_1.pdf
You might also want to take a look at this 8051 Tutorial: www.8052.com/tutorial.phtml
And some books about the 8051: http://www.keil.com/books/8051books.asp www.8052.com/books.phtml
Thanks for the links....they were helpful..
Thanks for the reply..but we use dptr only in case of indexed addressing mode or for accessing the code space & not the 8 bit RAM space for which we are using the R0 & R1 registers of specific banks. My question is why??is it because the chip was made like this i.e, architecture dependent.What will happen if we use other registers??Obviously it'll give some errors but, if we could change something inside the chip & then use other registers,what will happen?
"My question is why?? is it because the chip was made like this"
Yes, it is - that's what I said to you earlier!
"What will happen if we use other registers??"
Did you actually read the Instruction Set document?
Look at Table 7 on page 13 - it clearly tells you:
"@Ri = 8-bit internal data RAM location (0-255) addressed indirectly through register R1 or R0"
R0 and R1 are the only two possibilities; there are no others!
If you look at the instruction encodings, you will see that the 'i' from "Ri" is encoded as a single bit - so it cannot possibly be anything other than 0 or 1; ie, R0 or R1.
You cannot use other registers - it is impossible! The instructions simply do not exist!
"if we could change something inside the chip"
Then it wouldn't be an 8051 any more, would it?
Sure, you could design your own architecture based upon the 8051 - but then you would also have to develop all your own software tools, since no 8051 tools would support it!
Thanks for your time and the answers Mr Andy.I am now convinced that only R0 & R1 can be used.But why did the chip manufacturers went for only the 1st two registers of any bank?someone told me it is because internally the MC executes certain jump instructions to move to the addresses of the particular registers to fetch their contents.And since R0 & R1 are the 1st two registers of any bank, the number of machine cycles is reduced incase we jump to R0/R1 and not any other registers,in which case time required to reach them will be more.Is it the case???please guide me!!
An 8-bit processor has very short instructions. A single byte can hold 256 values.
As Andy noted, the instruction uses 1 bit to select R0 or R1.
A processor with very few instructions can use more bits to select registers. A processor with many different instructions has fewer bits available for registers.
One of the reasons for the register banks is that it allows the processor to get a lot more registers without consuming extra bits in all instructions. It is enough to add instructions to perform the bank switch.
A 32-bit processor could have implemented 32 or 64 general registers, and allowed the compiler and/or the developer to specify which registers that should be reserved for different interrupt functions, and which registers should be gp registers in the main program.
A 64-bit processor that has 64-bit base instruction size can support a huge number of registers and still have room for a 32-bit offset, i.e. a fixed-size instruction mov r43,[r12+r15+1000000000];
Besides the size of the instruction set, there is another difference. The C51 processor is an old processor, and the original releases had a very, very small number of transistors. This requires limitations in the instruction set. A more complex instruction decoding requires more transistors, i.e. larger silicon area and larger current consumption.
Modern C51 processors can contain a lot more transistors and still keep a small die size and a low power consumption. The added transistors has been used to pipeline the chip, allowing overlapping execution of multiple instructions.
"I am now convinced that only R0 & R1 can be used"
Reading the Instruction Set document should have convined you of that!
"But why did the chip manufacturers went for only the 1st two registers of any bank?"
It is the chip designer's prerogative to design the chip in whatever way seems best to them within their design constraints. We shall probably never know why - and we don't need to! All we need to know is the available instructions set - then get on and use it!
However, as previously noted, the 'i' from "Ri" is encoded into a single bit; so the only way to support more registers would be to add more opcodes - and the 8051 doesn't have any spare opcodes! [1] Either that, or the @Ri opcodes would have to be extended by an extra byte - which would make the processor more complex, and the code bigger & less efficient. And to what benefit?
"Is it the case???"
Sounds highly unlikely to me! By using a single bit, the processor can simply select one register or the other - no need for additional internal "jump" instructions!
"please guide me!!"
Why does it actually matter?
If you want to study the internal operation of the 8051, there are plenty of models of it available on the web - you would need to study them!
It really isn't an issue for discussion here, as it has nothing to do with Keil software tools!
[1] Actually, there is 1 spare opcode - if you want to design your own "extended" 8051 instruction set, that would be the place to start...
unfortunetely, many start with the '51 without reading "the bible".
I do not have an idea how to make it so that everyone, the moment they say 8051/MCS-51/'51 (in whichever form) automatically get the links to "the bible" sent to them. It would be very beneficial if it was so.
Erik
I found two routines from different books to start working with an LCD. The first one (at LCD.asm) works on PROTEUS but not physically. The second one (at LCD3.asm) works nowhere but is supposed to. Can anyone help me fix the routines I've got or give me one in assembly language that actually works?
1-Vss (GND) 2-Vdd (5V) 3-Vss (GND) 4-RB6 5-Vss (GND) 6-RB5 7 to 14 - RB0 to RB7
Can anyone help me fix the routines I've got 1) how can anyone 'fix' what they can not see 2) if you can not ask a specific question you need to study the datasheet for your LCD before posting.