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Why do we use only R0 & R1 in case of Indirect Addressing mode and why not any other GP registers? Can we use R0 & R1 of any bank or only Bank 0?
"I am now convinced that only R0 & R1 can be used"
Reading the Instruction Set document should have convined you of that!
"But why did the chip manufacturers went for only the 1st two registers of any bank?"
It is the chip designer's prerogative to design the chip in whatever way seems best to them within their design constraints. We shall probably never know why - and we don't need to! All we need to know is the available instructions set - then get on and use it!
However, as previously noted, the 'i' from "Ri" is encoded into a single bit; so the only way to support more registers would be to add more opcodes - and the 8051 doesn't have any spare opcodes! [1] Either that, or the @Ri opcodes would have to be extended by an extra byte - which would make the processor more complex, and the code bigger & less efficient. And to what benefit?
"Is it the case???"
Sounds highly unlikely to me! By using a single bit, the processor can simply select one register or the other - no need for additional internal "jump" instructions!
"please guide me!!"
Why does it actually matter?
If you want to study the internal operation of the 8051, there are plenty of models of it available on the web - you would need to study them!
It really isn't an issue for discussion here, as it has nothing to do with Keil software tools!
[1] Actually, there is 1 spare opcode - if you want to design your own "extended" 8051 instruction set, that would be the place to start...