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  • Answered

    FVP Cortex R52 +1

    • Cortex-R52
    • Generic Interrupt Controllers
    • Cortex R
    • Fixed Virtual Platform
    16820 views
    5 replies
    Latest over 7 years ago
    by Tibor
  • Not Answered

    AMBA 3 AHB-Lite Protocol master and slave connection 0

    • AMBA 3
    • AHB-Lite
    20455 views
    5 replies
    Latest over 7 years ago
    by Anish
  • Answered

    GICv3 -- accessing the redistributors of other cores +1

    • Generic Interrupt Controller (GIC)
    13381 views
    2 replies
    Latest over 7 years ago
    by Olivier Delande
  • Not Answered

    How to read ARM A9 registers in C? 0

    • Cortex-A9
    • Cortex-A
    • C
    13193 views
    1 reply
    Latest over 7 years ago
    by Martin Weidmann Arm Employee Badge
  • Not Answered

    Stick timer 0

    • Cortex-M0
    • Cortex-M
    12987 views
    1 reply
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Suggested Answer

    barrier instructions Vs. barrier transactions +1

    • AMBA
    • AMBA 3
    • ACE
    14708 views
    1 reply
    Latest over 7 years ago
    by Christopher Tory Arm Employee Badge
  • Suggested Answer

    FreeRtos software timer 0

    • stm32cubemx
    • Cortex-M
    17444 views
    2 replies
    Latest over 7 years ago
    by Former Member
  • Answered

    Question about AHB-Lite interconnection 0

    • AHB-Lite
    17214 views
    4 replies
    Latest over 7 years ago
    by Jacky Chou
  • Not Answered

    STM32F103 and FTDI problem.Terminal doesn't transmit to FTDI 0

    • STM32F
    14616 views
    2 replies
    Latest over 7 years ago
    by Former Member
  • Answered

    GICv2 deactivation feature. 0

    • CoreLink GIC-400
    • Generic Interrupt Controller (GIC)
    12806 views
    3 replies
    Latest over 7 years ago
    by Olivier Delande
  • Not Answered

    Send Analog signals through ARM Cortex M3 0

    • Cortex-M3
    • Cortex-M
    • Internet of Things (IoT)
    14649 views
    2 replies
    Latest over 7 years ago
    by Husam Al-Kuran
  • Not Answered

    How can I force a Usage (instruction) exception in cortex m4 0

    • Cortex-M
    • Cortex-M4
    11633 views
    1 reply
    Latest over 7 years ago
    by 42Bastian Schick
  • Suggested Answer

    pseudocode description of transfer in AXI 0

    • AXI
    12134 views
    1 reply
    Latest over 7 years ago
    by Colin Campbell Arm Employee Badge
  • Not Answered

    Where is M4 hardware breakpoint address? 0

    • Cortex-M
    • STM32F
    • Cortex-M4
    12411 views
    1 reply
    Latest over 7 years ago
    by 42Bastian Schick
  • Answered

    remapping the interrupt vector table to alternate locations in the memory map +1

    • Mbed
    • Interrupt
    15919 views
    2 replies
    Latest over 7 years ago
    by Ronin
  • Answered

    Endian about AHB-Lite and AHB5 Specification 0

    • AMBA 3
    • AHB-Lite
    • AMBA 5
    15167 views
    2 replies
    Latest over 7 years ago
    by Jacky Chou
  • Answered

    AHB Lite Multiple burst without idle transfer +1

    • AHB-Lite
    11878 views
    2 replies
    Latest over 7 years ago
    by Muthuvenkatesh
  • Suggested Answer

    burst-based transactions on AXI 0

    • AXI
    16793 views
    1 reply
    Latest over 7 years ago
    by Colin Campbell Arm Employee Badge
  • Not Answered

    CMSIS osThreadFlagsSet() API 0

    • STM32FDISCOVERY
    • CMSIS
    14172 views
    1 reply
    Latest over 7 years ago
    by Vladimir Umek Arm Employee Badge
  • Not Answered

    How to use DTCM in multicore ? 0

    • Cortex-M
    12200 views
    2 replies
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
<>
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