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remapping the interrupt vector table to alternate locations in the memory map

Ras Sharif

dear All,

in nxp lpc 1768 i read "remapping the interrupt vector table to alternate locations in the memory map".

for which reason one should to remap the interrupt vector table?

regards,
Ras

Parents
  • 0 in reply to Yasuhiko Koumoto

    Hi Sir,

    I have a doubt, about Interrupt Vector Table (IVT) location as follows.

    • Whether the Interrupt vector table remains in lowest address (0x00000000) irrespective of what memory mapping is used? As the RST  in IVT in Boot mode, must point to Boot block address (with instruction JMP 0x7FFFD000 in LPC2148).So IVT is always at 0x00000000 location and only Program Counter is moved to Boot block.
    • Whether IVT is writable based on MEMMAP register (which decides the Memory Mapping source for Active IVT)? As for Boot mode, its JMP 0x7FFFD000 and for SDRAM mode, RST must point to SDRAM address (like JMP 0x40000000) 

    Also, if IVT is at 0x0, then the user coding starts after that IVT from 0x00000000 (i.e ) after 64bytes from 0x0 since IVT is of 64bytes. Am I right?

Reply
  • 0 in reply to Yasuhiko Koumoto

    Hi Sir,

    I have a doubt, about Interrupt Vector Table (IVT) location as follows.

    • Whether the Interrupt vector table remains in lowest address (0x00000000) irrespective of what memory mapping is used? As the RST  in IVT in Boot mode, must point to Boot block address (with instruction JMP 0x7FFFD000 in LPC2148).So IVT is always at 0x00000000 location and only Program Counter is moved to Boot block.
    • Whether IVT is writable based on MEMMAP register (which decides the Memory Mapping source for Active IVT)? As for Boot mode, its JMP 0x7FFFD000 and for SDRAM mode, RST must point to SDRAM address (like JMP 0x40000000) 

    Also, if IVT is at 0x0, then the user coding starts after that IVT from 0x00000000 (i.e ) after 64bytes from 0x0 since IVT is of 64bytes. Am I right?

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