Arm Development Studio forum Interrupt not seen by M0 core

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Interrupt not seen by M0 core

Note: This was originally posted on 13th October 2011 at http://forums.arm.com

I am sending an interrupt to the M0 from another processor. In the NVIC registers I can see the interrupt pending, and I also can see that the interrupt in question is enabled. The firmware never see's the interrupt. There must be another level of interrupt enable that I have missed. Any suggestions? I attached my vector table. I am asserting general interrupt 0.