You could try the PMU
Cortex-A8 has 4 event count registers in addition to the cycle count register - see the Event Selection Register in CP15 for the various options. [url="http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0204h/Bcfjicfj.html"]infocenter.arm.com/.../index.jspEvent '0x10' is the one you want.
> As I am working on OMAP3530, how to enable 4 event count register in user mode?Poke the appropriate bit in to the User Enable Register in the kernel, and then PMU counters should be visible in user-space.Where should I enable this register ? In which file of kernel ?[url="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0344j/Bgbcjifb.html"]infocenter.arm.com/.../url]
> As I am working on OMAP3530, how to enable 4 event count register in user mode?Poke the appropriate bit in to the User Enable Register in the kernel, and then PMU counters should be visible in user-space.[url="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0344j/Bgbcjifb.html"]infocenter.arm.com/.../url]
I'm not a Linux kernel hacker - but I doubt the kernel touches this register at all - so you might be best placed to do this update in your bootloader rather than in the kernel itself.