• Locked Locked
  • Replies 9 replies
  • Subscribers 119 subscribers
  • Views 4821 views
  • Users 0 members are here
Options
Related
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

how to check barnch miss predict

Rachit Shah
Note: This was originally posted on 3rd August 2009 at http://forums.arm.com

Hello,

I am doing coding in ARM- NEON Assembly on Cortex-A8 (ARMv7-a) architecture?

How to check that branch miss predict happened to avoid extra cycles?


Thanks,
Parents
  • Note: This was originally posted on 3rd August 2009 at http://forums.arm.com

    Hi,
    As I am working on OMAP3530, how to enable 4 event count register in user mode?
    I can able to check cycle counter by doing some changes in linux kernel but what are other changes require to access event counter?

    Thanks,
    rach
    Cortex-A8 has 4 event count registers in addition to the cycle count register - see the Event Selection Register in CP15 for the various options. 

    [url="http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0204h/Bcfjicfj.html"]infocenter.arm.com/.../index.jsp

    Event '0x10' is the one you want.
Reply
  • Note: This was originally posted on 3rd August 2009 at http://forums.arm.com

    Hi,
    As I am working on OMAP3530, how to enable 4 event count register in user mode?
    I can able to check cycle counter by doing some changes in linux kernel but what are other changes require to access event counter?

    Thanks,
    rach
    Cortex-A8 has 4 event count registers in addition to the cycle count register - see the Event Selection Register in CP15 for the various options. 

    [url="http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0204h/Bcfjicfj.html"]infocenter.arm.com/.../index.jsp

    Event '0x10' is the one you want.
Children
No data