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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3625 Questions
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  • Not Answered

    cortex M33 multicore debug resources 0

    3003 views
    3 replies
    Latest over 5 years ago
    by Sinie
  • Not Answered

    Reading Non-Secure PENDSVSET after re-entry into Secure PendSV 0

    3224 views
    2 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    About the snoop filter in CCI 550 0

    • Cache coherency
    • CoreLink CCI-550 Cache Coherent Interconnect
    13460 views
    0 replies
    Started over 5 years ago
    by zilly
  • Answered

    Cortex-A53 direct access to cache: How are instructions encoded in the L1 I-cache? 0

    • Cortex-A53
    • Cache
    • Cortex-A
    22813 views
    4 replies
    Latest over 5 years ago
    by zilly
  • Not Answered

    DRAM address mapping on a Cortex-A72 ARMv8 0

    • Cortex-A72
    • Armv8-A
    13744 views
    2 replies
    Latest over 5 years ago
    by Frederick
  • Answered

    Running armv7 binaries on armv8 0

    • Armv7-A
    • Armv8-A
    46998 views
    8 replies
    Latest over 5 years ago
    by Cyan101
  • Not Answered

    Which PMU Events for L2 Cache Misses on Cortex-A72 0

    15618 views
    2 replies
    Latest over 5 years ago
    by John Duffy
  • Not Answered

    Reading analog pin while boundary scanning 0

    • JTAG
    • Cortex-M4
    • CoreSight ETM-M4
    5345 views
    7 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    A low-overhead real time counter consistent cross processor cores 0

    25509 views
    2 replies
    Latest over 5 years ago
    by zilly
  • Not Answered

    Cortex A9 MMU 0

    25940 views
    17 replies
    Latest over 5 years ago
    by deas
  • Not Answered

    QSPI out of space Musca board 0

    • Source code
    • Musca-A
    • TrustZone
    2784 views
    1 reply
    Latest over 5 years ago
    by Lica
  • Not Answered

    Decoding the DRAM addressing from AXI byte addressing on PS side of ARM Cortex A53 0

    15261 views
    0 replies
    Started over 5 years ago
    by fpga123
  • Not Answered

    Memory profiling (ARM Musca A1 Board) 0

    • Musca-A
    • CoreLink SSE-200 Subsystem for Embedded
    • Cortex-M33
    • Memory
    1618 views
    0 replies
    Started over 5 years ago
    by Lica
  • Not Answered

    FPU vs CPU load/store performance 0

    14292 views
    3 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    ordering of memory access (Cortex M0+) 0

    1818 views
    0 replies
    Started over 5 years ago
    by Tony5566
  • Not Answered

    Debug probes interoperability 0

    • Debugger
    2051 views
    0 replies
    Started over 5 years ago
    by Attila Várhelyi
  • Not Answered

    Support for NUMA in ARMv8? 0

    17668 views
    3 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Suggested Answer

    STM32F103C6 doesn't receive the complete data thorugh i2c as a slave with interrupt enabled, mantains SCL low after first data byte 0

    • Interrupt Handling
    6057 views
    2 replies
    Latest over 5 years ago
    by vra
  • Not Answered

    Cortex A9 - ACP slave outstanding read requests 0

    12221 views
    0 replies
    Started over 5 years ago
    by RazvanN
  • Not Answered

    Reading suggestions to start programming with STM32H747 like mcu, especially with GCC 0

    • Multiprocessor
    • Cortex-M7
    • multithreading
    • Cortex-M4
    6160 views
    5 replies
    Latest over 5 years ago
    by 42Bastian Schick
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