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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3593 Questions
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  • Answered

    Getting Execution Time of progams on armv8_64-bit processors +1

    • Cortex-A57
    • C++
    • Profiling
    • Armv8-A
    24433 views
    1 reply
    Latest over 6 years ago
    by vstehle Arm Employee Badge
  • Answered

    About unsupported exclusive or atomic access issue +1

    25927 views
    2 replies
    Latest over 6 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    DMA 0

    24276 views
    5 replies
    Latest over 6 years ago
    by Daniel72
  • Suggested Answer

    Secure SPI : STM32MP157-DK1 board 0

    • Armv7-A
    • stm32cubemx
    • Cortex-A
    • STM32
    • TrustZone
    23780 views
    1 reply
    Latest over 6 years ago
    by Andy Neil
  • Not Answered

    peripheral register access RMW vs Bit Banding 0

    5519 views
    4 replies
    Latest over 6 years ago
    by Lorenz Grübler
  • Answered

    What is the priority between synchronous data abort and FIQ in Cortex-R5F? 0

    • Cortex-R5
    • Interrupt
    9636 views
    6 replies
    Latest over 6 years ago
    by Etienne Alepins
  • Not Answered

    Obtain CPU Temperature in Kernel 0

    • Cortex-A53
    • Kernel Developers
    • Raspberry Pi 3
    • Armv8-A
    22528 views
    0 replies
    Started over 6 years ago
    by zzT
  • Answered

    How to initialize DCISW reg. +1

    21556 views
    1 reply
    Latest over 6 years ago
    by Martin Weidmann Arm Employee Badge
  • Not Answered

    Does "LDRD" instruction cause "UNDEFINSTR" error on Cortex-M4? 0

    • Cortex-M4
    12021 views
    9 replies
    Latest over 6 years ago
    by Gavin Li
  • Answered

    Cortex-M Vector Table and Address Remap 0

    • Embedded Software
    • Cortex-M0
    • Interrupt Handling
    • System on Chip (SoC)
    10789 views
    2 replies
    Latest over 6 years ago
    by eugch
  • Not Answered

    Detect if Interrupt Happened 0

    6222 views
    3 replies
    Latest over 6 years ago
    by Trampas
  • Answered

    Running two bare-metal programs on two separate cores in Cortex-A9 +1

    • Armv7-A
    • Cortex-A
    • DS-5 Debugger
    • Baremetal
    27961 views
    3 replies
    Latest over 6 years ago
    by 42Bastian Schick
  • Answered

    SDRAM Window Boundary in MPU Address space in Cyclone V (Dual Cortex A9) 0

    • Cortex-A9
    22124 views
    1 reply
    Latest over 6 years ago
    by 42Bastian Schick
  • Answered

    determine a page size on armv8 +1

    • Armv8-A
    • Memory Management Unit (MMU)
    24195 views
    2 replies
    Latest over 6 years ago
    by 42Bastian Schick
  • Suggested Answer

    How can I debug two A53 cores in DS-5 tool 0

    22161 views
    1 reply
    Latest over 6 years ago
    by Adeeljs
  • Not Answered

    Arm DynamIQ Shared Unit 0

    • L3
    • DynamIQ
    • Cache Architecture
    • DSU
    20439 views
    0 replies
    Started over 6 years ago
    by Errno
  • Not Answered

    ARM VETX.32 q1,q1,q1,#3 Slow 0

    19635 views
    0 replies
    Started over 6 years ago
    by br-dev
  • Answered

    Program Counter, Stack Pointer and Link Register Status During an Interrupt Service in ARM based Processors +1

    7362 views
    2 replies
    Latest over 6 years ago
    by Aman007kc
  • Answered

    ARM Assembly how to print numbers instead of their ascii representation of that number +1

    • Armv6
    • Arm Assembly Language (ASM)
    19298 views
    2 replies
    Latest over 6 years ago
    by Kanan Jarrus
  • Answered

    Cortex R8 axi unaligned transfer 0

    • program
    • cortex-r8
    5994 views
    2 replies
    Latest over 6 years ago
    by Ben Chen
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