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Unaligned accesses - CMSDK Example Cortex M0

eugch over 6 years ago

The spec mentions that the M0 will generate a Hardfault when unaligned accesses are detected. I would like to find out where is this implemented in RTL and understand it a little better.

Does the GCC compiler detects unaligned code accesses during compilation as well?

Top replies

Trampas over 6 years ago +1 verified

As I understand it the instruction fetch hardware does this. That is an assembly instruction word needs to be aligned to 4 bytes. For example first instruction at address 0x1000 and then second one at...
42Bastian Schick over 6 years ago in reply to eugch +1

The least significant bit of the PC is ignored. So there is no "unaligned" code. Of course, if you jump in the middle of a 4 byte instruction, you'll get a hard fault. But unaligned data accesses are...