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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3593 Questions
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  • Answered

    ARM v7 Instruction Set Architecture Opcode Code +1

    • Armv7
    • Armv7-A
    • Arm Assembly Language (ASM)
    • AArch32
    23800 views
    4 replies
    Latest over 8 years ago
    by meromeo
  • Answered

    Arm1176 processor is getting hang, when I use Multiple register data transfer instructions, my Stack pointer is in DDR +1

    6818 views
    7 replies
    Latest over 8 years ago
    by daith
  • Answered

    Security principles for TrustZone for ARMv8-M - example slide 22 +1

    • Security
    • TrustZone
    • Armv8-M
    • Interrupt
    • Memory
    9203 views
    2 replies
    Latest over 8 years ago
    by raghu.ncstate
  • Answered

    Development with ARMv8a debug (and watchpoint) registers. +1

    4901 views
    1 reply
    Latest over 8 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    How to know if the processor is in EL0 state on armv8? +2

    • ARMv8 Exception Model
    • Armv8
    12472 views
    6 replies
    Latest over 8 years ago
    by Ajeesh
  • Answered

    Porting code From Cortex-A9 to Cortex-R7 0

    • Armv7
    • Cortex-A9
    • Arm Assembly Language (ASM)
    • Cortex-R7
    5448 views
    3 replies
    Latest over 8 years ago
    by Ajeesh
  • Answered

    Cortex M4, guidance for an i/o assembly tuition +1

    3711 views
    1 reply
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    trace debug functionality in ARM cortex M0 0

    9688 views
    2 replies
    Latest over 8 years ago
    by ayz
  • Answered

    Where can I find the device-specific JTAG instructions for Cortex-M3? +1

    • JTAG
    • Cortex-M3
    7173 views
    1 reply
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    On a watchpoint synchronous data abort, how do I determine the data address? +1

    • Armv7 Exception Model
    4239 views
    1 reply
    Latest over 8 years ago
    by jhickman
  • Answered

    Can I map the code/data memory as device memory +1

    4314 views
    3 replies
    Latest over 8 years ago
    by Peter Rielly Arm Employee Badge
  • Answered

    Porting code from Cortex-A9 to Cortex-A57 0

    • Cortex-A57
    • Cortex-A9
    • AArch64
    • Arm Assembly Language (ASM)
    • AArch32
    5588 views
    3 replies
    Latest over 8 years ago
    by Peter Rielly Arm Employee Badge
  • Answered

    Processor Modes in cortex-A57 +1

    • Cortex-A53
    • Cortex-A57
    • Cortex-A9
    • AArch64
    7773 views
    4 replies
    Latest over 8 years ago
    by daith
  • Answered

    How to add particular interface (I2C or SPI) to the trustzone from software in qualcomm MSM8909 platform. +1

    • ACE
    • TrustZone
    • Armv8-M
    • Interface
    10120 views
    1 reply
    Latest over 8 years ago
    by Peter Rielly Arm Employee Badge
  • Answered

    The mutex implementation for TCM when using both cores-ARM9 that shares TCM +1

    4168 views
    2 replies
    Latest over 8 years ago
    by dortain
  • Not Answered

    What is the top level difference in features between Cortex-M23 and Cortex-M0+? 0

    • Cortex-M0
    • Cortex-M23
    • Trace
    • ACE
    • AXI
    • CHI
    • Security
    • Cortex-M3
    • Cortex-M
    • Memory Access Instructions
    • TrustZone
    • Cortex-M33
    • Armv8-M
    • Internet of Things (IoT)
    • AHB
    • Interrupt
    15202 views
    0 replies
    Started over 8 years ago
    by Diya Soubra Arm Employee Badge
  • Answered

    ARM v8 Neon instruction for multiply long +1

    4301 views
    1 reply
    Latest over 8 years ago
    by daith
  • Answered

    Pending interrupt status +1

    • Processor Architecture
    • Interrupt
    8558 views
    2 replies
    Latest over 8 years ago
    by Peter Rielly Arm Employee Badge
  • Answered

    Cortex-R7 ABT-Exception on Programstart +1

    4216 views
    2 replies
    Latest over 8 years ago
    by Martin K.
  • Answered

    LPC43XX (Cortex-M4): Timer triggered DMA transfer? 0

    • DMA Controller
    • Cortex-M4
    7020 views
    1 reply
    Latest over 8 years ago
    by Andrea Bettati
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Topics being discussed in this forum
  • AArch64
  • AMBA
  • Arm Assembly Language (ASM)
  • Armv7-A
  • Armv8-A
  • Armv8-M
  • AXI
  • Cache
  • Cortex-A
  • Cortex-A53
  • Cortex-A7
  • Cortex-A8
  • Cortex-A9
  • Cortex-M
  • Cortex-M0
  • Cortex-M3
  • Cortex-M4
  • Cortex-M7
  • Cortex-R
  • Interrupt
  • Linux
  • Memory
  • Memory Management Unit (MMU)
  • NEON
  • TrustZone