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Enable MMU and d-cache on ARMv8 for u-boot

pkumar25

Hi,
This question is for MMU and d-cache. When I tried to enable MMU and d-cache for u-boot I ran into Synchronous Abort handler while writing to PCIe device registers which I mapped as uncached memory. The dump is shown below
"Synchronous Abort" handler,

"Synchronous Abort" handler, esr 0x96000147
ELR: 3fe3d3e4
LR: 3fe3d48c
x0 : 0000000000000020 x1 : 0000000080040000
x2 : 0000000080049fc0 x3 : 0000000000000040
x4 : 000000000000003f x5 : 0000000080040000
x6 : 0000000080049fff x7 : 000000000000000f
x8 : 0000000000000008 x9 : 000000003ee3c000
x10: 0000000000000000 x11: 0000000000000020
x12: 00000000ffffffff x13: 00000000ffffffff
x14: 000000003fe3c398 x15: 00000000010010d0
x16: 0000000001000104 x17: 0000000000000000
x18: 000000003ea2be20 x19: 0000000000000000
x20: 000000003fe9cd18 x21: 000000003ffbb000
x22: 000000003feaf9c8 x23: 0000000000000000
x24: 000000003feaf9a1 x25: 000000003fe9c000
x26: 000000003feaf91b x27: 000000003ffbbaf8
x28: 0000000000000000 x29: 000000003ea2bd30

Resetting CPU ...

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