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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3582 Questions
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  • Not Answered

    [MSP/PSP] Context switching + Interrupt handling 0

    • mbed OS
    • R13 (SP Stack Pointer)
    • Cortex-M0+
    • 11 (SVCall)
    3809 views
    3 replies
    Latest over 4 years ago
    by 42Bastian Schick
  • Not Answered

    Bare Metal Code Development for iMX8M Mini 0

    • Arm Compiler
    • Compilers
    • Baremetal
    8844 views
    13 replies
    Latest over 4 years ago
    by 42Bastian Schick
  • Answered

    64-bit divider using Cortex-M3 0

    • Cortex-M3
    • Arm Assembly Language (ASM)
    3109 views
    5 replies
    Latest over 4 years ago
    by 42Bastian Schick
  • Not Answered

    Why performance is higher on LITTLE cores? 0

    • big.LITTLE
    • performance
    • multithreading
    13653 views
    14 replies
    Latest over 4 years ago
    by zois
  • Answered

    [Cortex M0+] Use the same ISR for multiple interrupt sources 0

    • mbed OS
    • Interrupt Handling
    • Cortex-M0+
    3001 views
    3 replies
    Latest over 4 years ago
    by riglesias
  • Not Answered

    VCVT instruction in ARM M4-F 0

    • Floating-Point Processing Instructions
    • Floating Point
    • Cortex-M4
    2018 views
    1 reply
    Latest over 4 years ago
    by 42Bastian Schick
  • Answered

    Cortex M-7: How to tell the current privilege level? 0

    • Real Time Operating Systems (RTOS)
    • Cortex-M7
    • Registers
    6020 views
    4 replies
    Latest over 4 years ago
    by tobermory
  • Answered

    Why does the following code not blinking the built-in LED (A_5) on an F103RB board when using the CIM-RTOS2 API. The same code works when using the older CIM-RTOS API. There are no compilation errors: no errors no warning when compiling. The code does work 0

    2041 views
    2 replies
    Latest over 4 years ago
    by HendersonH
  • Suggested Answer

    CMSIS-RTOS2 not working on the F103RB board 0

    1991 views
    1 reply
    Latest over 4 years ago
    by Andy Neil
  • Answered

    STM32F103RB (Cortex M3): Connecting to CPU via connect under reset failed after flashing a deep sleep mode manager software 0

    • Cortex-M3
    • STM32 F1
    6272 views
    9 replies
    Latest over 4 years ago
    by Nidhal Ben Othmen
  • Suggested Answer

    multiple uart managing stm32 0

    2084 views
    1 reply
    Latest over 4 years ago
    by Andy Neil
  • Answered

    Understanding the ARM processor 0

    4418 views
    2 replies
    Latest over 4 years ago
    by Evans123
  • Not Answered

    Link (?) problem using pre-built cross-compiler 0

    1938 views
    1 reply
    Latest over 4 years ago
    by smblackledge
  • Suggested Answer

    STM32F407 - Flag RXNE of SPI is clear when i read. Sometimes is stack in waiting the flag. 0

    • Keil
    • Cortex-M4
    • STM32 F4
    3005 views
    1 reply
    Latest over 4 years ago
    by Andy Neil
  • Not Answered

    Are any other ways to exit Handler mode to Thread mode on Cortex M processors? 0

    • Armv7 Exception Model
    • Cortex-M3
    • Cortex-M
    4173 views
    4 replies
    Latest over 4 years ago
    by haupt29
  • Not Answered

    Force get access to Cortex-M0 if SWDIO is disabled on startup. 0

    • Cortex-M0
    • SWD
    2091 views
    2 replies
    Latest over 4 years ago
    by YurySokolov
  • Answered

    Break point at SWI handler 0

    • Arm9
    5500 views
    2 replies
    Latest over 4 years ago
    by Jones212
  • Not Answered

    Why have a IDAU/SAU when one has a MPC 0

    2495 views
    0 replies
    Started over 4 years ago
    by Chris Daniels
  • Answered

    Current priority level of processor 0

    • Armv7-M
    • Cortex-M
    • Cortex-M4
    10564 views
    6 replies
    Latest over 4 years ago
    by WestfW
  • Not Answered

    Enabling the SysTick interrupt appears to put the processor into low power mode 0

    • Cortex-M7
    • 15 (SysTick)
    • STM32 F7
    3801 views
    3 replies
    Latest over 4 years ago
    by Starman
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