Detect RESET cause on Cortex M3 (STM32F107)?

Thanks Vanhealsing.

Yes, I can use GPIO, but then we must modify our HW which we try to avoid. So:

In short:

1. I want my MCU, by a programmable assembly code (is there such an assembly instruction for ARM/Cortex-M3?), to assert a low signal to my NRST to ensure a RESET of my "external HW circuit".
2. Furthermore, I want my program by assembly code (is there such an assembly instruction for ARM/Cortex-M3?) to read the "cause of RESET".

Other MCUs I have been working with included an assembly instructions named "RESET" (or similar).

By executing this instruction, the MCU turn its NRST pin to an output-pin, and generates a low NRST/RESET signal (to reset all devices connected to this common RESET/NRST bus). I think It also would reset the MCU itself.

Next, when the MCU is (re-) started, the MCU could execute another assembly instruction which detects the "cause of reset". In that way we could distinguish a "power-on-reset" from a "MCU-forced-reset" (caused by this assembly instruction).

Are there two similar assembly instruction for ARM Cortex-M3 as described in 1 and 2 above?

Best Regards

Terje Bohler

Thanks Vanhealsing.

Yes, I can use GPIO, but then we must modify our HW which we try to avoid. So:

In short:

1. I want my MCU, by a programmable assembly code (is there such an assembly instruction for ARM/Cortex-M3?), to assert a low signal to my NRST to ensure a RESET of my "external HW circuit".
2. Furthermore, I want my program by assembly code (is there such an assembly instruction for ARM/Cortex-M3?) to read the "cause of RESET".

Other MCUs I have been working with included an assembly instructions named "RESET" (or similar).

By executing this instruction, the MCU turn its NRST pin to an output-pin, and generates a low NRST/RESET signal (to reset all devices connected to this common RESET/NRST bus). I think It also would reset the MCU itself.

Next, when the MCU is (re-) started, the MCU could execute another assembly instruction which detects the "cause of reset". In that way we could distinguish a "power-on-reset" from a "MCU-forced-reset" (caused by this assembly instruction).

Are there two similar assembly instruction for ARM Cortex-M3 as described in 1 and 2 above?

Best Regards

Terje Bohler

Hi there,

The Cortex-M3 processor itself does not have any instruction to trigger nRST pin directly. Since different chips have different reset circuits, different reset sources (e.g. different types of watchdog, brown out detector), these type of reset control and reset reporting mechanism has to be defined by chip designer (i.e. ST in your case).

The architectural feature to allow software to generate reset is SYSRESETREQ (System Reset Request). In C programming you can use CMSIS-CORE function NVIC_SystemReset(). This reset the microcontroller system, but does not trigger nRST unless ST add additional feature at chip level to support this.

regards,

Joseph

Thank you Joseph.

So, a smal HW-mod is required (I must use a GPIO pin for the job) ...

Best Regards
Terje Bohler