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Cortex A9 (IMX6) : Enabling branch prediction aborts

Hello,

I am using imx6 (cortex- A9) board, and my mmu environment is as follows
            mmu   - enabled
            L1 data cache - enabled
            L1 instruction cache - enabled
            D-side prefetch - enabled
            L2 cache - disabled
            Branch prediction - disabled

With this environment, my code runs for a longer time (more than 12 hours) with out any issues.
But, if I enable branch prediction, the code aborts in few seconds, at random addresses.
I am not able to understand what goes wrong.
Are there any special option which I have to consider while building my code.
I am using GCC as the compiler.


Note : In my code, I am using a static library, which was given by our vendor.

Any help would be great.

Thanks,

Gopu

 

Parents
  • Hello,

                In the PMU module, vdd values were not properly configured for ARM core clock. After configuring this properly, we were able to solve this issue. Sorry for the late reply. Hope this helps someone in future.

    Thanks,

    Gopu

Reply
  • Hello,

                In the PMU module, vdd values were not properly configured for ARM core clock. After configuring this properly, we were able to solve this issue. Sorry for the late reply. Hope this helps someone in future.

    Thanks,

    Gopu

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