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Confusion about exception level of ARMv8

Hi,

I am fairly new to ARM processor and start work with cortexA57 recently.  After reading the technical manual and programmer guide , I have some questions regarding the exception level of v8.

1. How does the exception level change from one to another ?

     According to the documents, the EL can only be changed on taking exception. And also when an exception happens, the EL can only changed to a higher level. Then , how is it changed from higher EL to lower EL ?  For example, on reset, the processor starts at EL3, then how does it switch to execute program on the other levels ? Could anyone give an example to show how the EL changes during a boot sequence ?

2. How to get the current EL value ?

    The document says the register PSTATE contains a field CurrentEL which indicates on which EL the processor is executing.  Is the PSTATE register only existed in Aarch64 execution state , or it is also existed in Aarch32 ?  If not, how to read current EL value from Aarch32 ?

Thanks in advance !

Best regards,

Xinwei

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