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GIC memory map cannot be changed in bare metal development environment

Hello Folks,
I have a question about not being able to change the GIC memory map in the baremetal development environment.

■ Questions
I am implementing interrupt processing in a bare metal development environment. If the GIC is placed in the default memory map of the sample project stored in the DS-5 installation directory, interrupts work normally, but if the memory map is changed, the program hangs. Could you please tell me how to fix it?
The bare metal development environment uses startup_Cortex-A55_Cortex-A75 which is stored in the installation directory of DS-5 v5.29.3.
*Since VirtualPrototyping is used for the target device, it is easy to change the memory map of the circuit.

■Details: What I researched
Since it was necessary to change the physical address size to 1TB (40bits), it was necessary to change the MMU setting, but startup_Cortex-A55_Cortex-A75 (DS-5 v5.29.3.) contains the MMU setting code. I had to code it myself because I didn't have it. When stepping in instruction step mode, the operation becomes strange immediately after writing the set value to the TCR_EL1 register, so I think there is a high possibility that the MMU setting is incorrect.
However, I know that the MMU/MPU view of DS-5 or Arm DS cannot be used with the debugger connection method I am currently using.

MMU/MPU view/Commands view cannot be used with DS-5. - Arm Development Studio forum - Support forums - Arm Community

Immediately after writing the set value to the TCR_EL1 register, it seems that the connection with the debugger has been cut off. I don't see any disassembled code, and the general register values say "Error: Target not available". Therefore, it is not known whether an exception interrupt has occurred.

■ Details: How to change the memory map
The memory map of the GIC has only changed from the default 0x2f000000 in startup_Cortex-A55_Cortex-A75 (DS-5 v5.29.3.) to 0x52800000, which is the target device specification. Specifically, in the scatter file (scatter.scat), the loading destinations of the GICv3 distributor and GICv3 redistributors are changed as follows. I understand that it is possible to change the memory map of GIC only with this change.

; GICv3 distributor
;GICD  0x2f000000 UNINIT 0x8000
GICD  0x52800000 UNINIT 0x8000
    GICv3_gicd.o (.bss.distributor)

; GICv3 redistributors
; 128KB for each redistributor in the system
;GICR  0x2f100000 UNINIT 0x80000
GICR  0x52900000 UNINIT 0x80000
    GICv3_gicr.o (.bss.redistributor)

■ Details: MMU settings
The boot code uses startup_Cortex-A55_Cortex-A75 (DS-5 v5.29.3.) as it is. In addition, the sources that I changed the setting by myself are as follows.

#include "mmu.h"

#pragma asm

extern uint64_t Image$$TTB0_L2_PERIPH$$ZI$$Base;

void mmu_init(void) {
  uint64_t r;
  uint64_t i;
  unsigned long* BaseAddress = &Image$$TTB0_L2_PERIPH$$ZI$$Base;

  printf("MMU table setting\n");
    mem_write((unsigned long)BaseAddress + 0x00 + 0x20*i ,0x00000F25 + 0x100000000*i);
    mem_write((unsigned long)BaseAddress + 0x08 + 0x20*i ,0x40000F25 + 0x100000000*i);
    mem_write((unsigned long)BaseAddress + 0x10 + 0x20*i ,0x80000F25 + 0x100000000*i);
    mem_write((unsigned long)BaseAddress + 0x18 + 0x20*i ,0xC0000F25 + 0x100000000*i);
  asm volatile ("isb");

  printf("TCR_EL setting\n");
  r = (0b00LL  << 37) |
      (0b010LL << 32) |
      (0b00LL  << 30) |
      (0b00LL  << 28) |
      (0b00LL  << 26) |
      (0b00LL  << 24) |
      (0b1LL   << 23) |
      (00LL    << 16) |
      (0b00LL  << 14) |
      (0b10LL  << 12) |
      (0b01LL  << 10) |
      (0b01LL  << 8)  |
      (0b0LL   << 7)  |
      (24LL    << 0); 
  asm volatile ("msr TCR_EL1, %0" : : "r" (r));
  asm volatile ("isb") ;

  • Thank you for reading. As we have learned from continuous research, we will expand the information. Does anyone have information that will lead to a solution?

    The method of changing the GIC memory map itself in the bare metal development environment seems to be correct. This is because it works normally depending on the destination address.

    When GIC is placed in the following area, it works normally.

    "If GIC is placed in the following area, it will not work properly.
    *In the ASIC you want to simulate by VirtualPrototyping, it is necessary to place a GIC in the following area."

    For reference, the result of objdumping ELF is below.

    sample_A5x.axf:     file format elf64-little
    Idx Name          Size      VMA               LMA               File off  Algn
      0 EXEC          00004e28  0000000080000000  0000000080000000  00001000  2**11
                      CONTENTS, ALLOC, LOAD, READONLY, CODE
      1 EXEC          00000020  0000000080004e28  0000000080004e28  00005e28  2**3
                      CONTENTS, ALLOC, LOAD, DATA
      2 EXEC          000009f8  0000000080004e48  0000000080004e48  00005e48  2**3
      3 ARM_LIB_HEAP  000a0000  0000000080005840  0000000080005840  00005e80  2**0
      4 ARM_LIB_STACK 00020000  00000000800a5840  00000000800a5840  00005e80  2**0
      5 EL3_STACKS    00008000  00000000800c5840  00000000800c5840  00005e80  2**0
      6 TTB0_L1       00001000  00000000800ce000  00000000800ce000  00006000  2**0
      7 TTB0_L2_RAM   00001000  00000000800cf000  00000000800cf000  00006000  2**0
      8 TTB0_L2_PRIVATE 00001000  00000000800d0000  00000000800d0000  00006000  2**0
      9 TTB0_L2_PERIPH 00001000  00000000800d1000  00000000800d1000  00006000  2**0
     10 TOP_OF_RAM    00000004  00000000800d2000  00000000800d2000  00006000  2**0
     11 CS3_PERIPHERALS 00090000  000000001c000000  000000001c000000  00006000  2**0
     12 GICD          00008000  0000000052800000  0000000052800000  00006000  2**3
     13 GICR          00040000  0000000052900000  0000000052900000  00006000  2**3
     14 .debug_abbrev 0000082e  0000000000000000  0000000000000000  00006000  2**0
                      CONTENTS, READONLY, DEBUGGING
     15 .debug_aranges 00000120  0000000000000000  0000000000000000  0000682e  2**0
                      CONTENTS, READONLY, DEBUGGING
     16 .debug_frame  00002970  0000000000000000  0000000000000000  0000694e  2**0
                      CONTENTS, READONLY, DEBUGGING
     17 .debug_info   0000252b  0000000000000000  0000000000000000  000092be  2**0
                      CONTENTS, READONLY, DEBUGGING
     18 .debug_line   000012a3  0000000000000000  0000000000000000  0000b7e9  2**0
                      CONTENTS, READONLY, DEBUGGING
     19 .debug_loc    00001132  0000000000000000  0000000000000000  0000ca8c  2**0
                      CONTENTS, READONLY, DEBUGGING
     20 .debug_pubnames 00000510  0000000000000000  0000000000000000  0000dbbe  2**0
                      CONTENTS, READONLY, DEBUGGING
     21 .debug_pubtypes 000003e5  0000000000000000  0000000000000000  0000e0ce  2**0
                      CONTENTS, READONLY, DEBUGGING
     22 .debug_str    0000129d  0000000000000000  0000000000000000  0000e4b3  2**0
                      CONTENTS, READONLY, DEBUGGING
     23 .debug_ranges 00000470  0000000000000000  0000000000000000  0000f750  2**0
                      CONTENTS, READONLY, DEBUGGING
     24 .comment      0000037c  0000000000000000  0000000000000000  0000fbc0  2**0
                      CONTENTS, READONLY