This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

GIC memory map cannot be changed in bare metal development environment

Hello Folks,
I have a question about not being able to change the GIC memory map in the baremetal development environment.

■ Questions
I am implementing interrupt processing in a bare metal development environment. If the GIC is placed in the default memory map of the sample project stored in the DS-5 installation directory, interrupts work normally, but if the memory map is changed, the program hangs. Could you please tell me how to fix it?
The bare metal development environment uses startup_Cortex-A55_Cortex-A75 which is stored in the installation directory of DS-5 v5.29.3.
*Since VirtualPrototyping is used for the target device, it is easy to change the memory map of the circuit.

■Details: What I researched
Since it was necessary to change the physical address size to 1TB (40bits), it was necessary to change the MMU setting, but startup_Cortex-A55_Cortex-A75 (DS-5 v5.29.3.) contains the MMU setting code. I had to code it myself because I didn't have it. When stepping in instruction step mode, the operation becomes strange immediately after writing the set value to the TCR_EL1 register, so I think there is a high possibility that the MMU setting is incorrect.
However, I know that the MMU/MPU view of DS-5 or Arm DS cannot be used with the debugger connection method I am currently using.

MMU/MPU view/Commands view cannot be used with DS-5. - Arm Development Studio forum - Support forums - Arm Community

Immediately after writing the set value to the TCR_EL1 register, it seems that the connection with the debugger has been cut off. I don't see any disassembled code, and the general register values say "Error: Target not available". Therefore, it is not known whether an exception interrupt has occurred.

■ Details: How to change the memory map
The memory map of the GIC has only changed from the default 0x2f000000 in startup_Cortex-A55_Cortex-A75 (DS-5 v5.29.3.) to 0x52800000, which is the target device specification. Specifically, in the scatter file (scatter.scat), the loading destinations of the GICv3 distributor and GICv3 redistributors are changed as follows. I understand that it is possible to change the memory map of GIC only with this change.

; GICv3 distributor
;GICD  0x2f000000 UNINIT 0x8000
GICD  0x52800000 UNINIT 0x8000
    GICv3_gicd.o (.bss.distributor)

; GICv3 redistributors
; 128KB for each redistributor in the system
;GICR  0x2f100000 UNINIT 0x80000
GICR  0x52900000 UNINIT 0x80000
    GICv3_gicr.o (.bss.redistributor)

■ Details: MMU settings
The boot code uses startup_Cortex-A55_Cortex-A75 (DS-5 v5.29.3.) as it is. In addition, the sources that I changed the setting by myself are as follows.

#include "mmu.h"

#pragma asm

extern uint64_t Image$$TTB0_L2_PERIPH$$ZI$$Base;

void mmu_init(void) {
  uint64_t r;
  uint64_t i;
  unsigned long* BaseAddress = &Image$$TTB0_L2_PERIPH$$ZI$$Base;

  printf("MMU table setting\n");
    mem_write((unsigned long)BaseAddress + 0x00 + 0x20*i ,0x00000F25 + 0x100000000*i);
    mem_write((unsigned long)BaseAddress + 0x08 + 0x20*i ,0x40000F25 + 0x100000000*i);
    mem_write((unsigned long)BaseAddress + 0x10 + 0x20*i ,0x80000F25 + 0x100000000*i);
    mem_write((unsigned long)BaseAddress + 0x18 + 0x20*i ,0xC0000F25 + 0x100000000*i);
  asm volatile ("isb");

  printf("TCR_EL setting\n");
  r = (0b00LL  << 37) |
      (0b010LL << 32) |
      (0b00LL  << 30) |
      (0b00LL  << 28) |
      (0b00LL  << 26) |
      (0b00LL  << 24) |
      (0b1LL   << 23) |
      (00LL    << 16) |
      (0b00LL  << 14) |
      (0b10LL  << 12) |
      (0b01LL  << 10) |
      (0b01LL  << 8)  |
      (0b0LL   << 7)  |
      (24LL    << 0); 
  asm volatile ("msr TCR_EL1, %0" : : "r" (r));
  asm volatile ("isb") ;