The Cortex A9 FPU Technical Reference Manual describe the FPSCR register and says:
The exception flags, bit  and bits [4:0] of the FPSCR are exported on the DEFLAGS output so they can be monitored externally to the processor, if required.
The question is very simple: Where is DEFLAGS, How can I access this register?
My aim is to monitor the exception bits and throw an interrupt when an exception is detected.
Many thanks to all.
Hi there, I have moved your question to the Architectures and Processors forum. Many thanks.
DEFLAGS is not a register (those values can be read from FPSCR), but a set of output signals of the processor. They are used in the overall SoC design, and may not (and likely not) be routed all the way to the external pins of a chip (you would need to consult the documentation of whichever device you are using).https://developer.arm.com/documentation/ddi0407/i/signal-descriptions/exception-flags-signals