There is ARM software optimization guide (e.g., https://developer.arm.com/documentation/swog309707/latest for neoverse n1) to look up the instruction latency and throughput for many instructons.
This guide doesn't seem to contain the latency and throughput for Neon or SVE. Is there a separate guide for NEON or SVE (e.g., the instruction latency and throughput for INSR (SIMD&FP scalar) instruction)?
INSR (SIMD&FP scalar)
A pointer would be very helpful!
Hi,
N1 does not implement SVE, but V1 does.
The Neoverse N1 Software Optimization Guide has details for the ASIMD instructions on N1. The Neoverse V1 Software Optimization Guide has details for both the ASIMD and the SVE instructions on V1.
Best regards,
Vincent.
thanks!
I'm able to find the table of NEON now. Probably it's because the 'ctrl+f' didn't work well in my PDF reader.