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turning off instruction and data prefetch on A53

DougM

We are trying to turn off the speculative prefetch on an the A53 cores in an LS1043A.

We are using the LS1043Ardb reference board running uboot.

We can find the cache enable/disable/flush functions, but nothing that configures the prefetch on L1 or L2.

Any ideas?

Parents
  • 0 in reply to vstehle

    Hi Vstehle,

    Thanks for the response.

    In the uboot code for the ls1043sRDB, there is a README.core_prefetch file that has a note in it to not turn off prefetch on cpu0, as it might produce unknown results.

    Do you know what that is about?

    We are running in a scenario where we would be willing to trade some speed optimization for a little more determinism. The processor doesn’t always prefetch the same way based on local criteria that we have no control over.

    Thanks in advance,

    Doug

Reply
  • 0 in reply to vstehle

    Hi Vstehle,

    Thanks for the response.

    In the uboot code for the ls1043sRDB, there is a README.core_prefetch file that has a note in it to not turn off prefetch on cpu0, as it might produce unknown results.

    Do you know what that is about?

    We are running in a scenario where we would be willing to trade some speed optimization for a little more determinism. The processor doesn’t always prefetch the same way based on local criteria that we have no control over.

    Thanks in advance,

    Doug

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