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Using interrupts not implemented as Software interrupts?

We know that a Cortex-M0 or any other Cortex-M may have fewer interruptions implemented the architecture defined in the standard, so we can not use interrupts implemented as software interrupts by manipulating the registers SETENA / ClrEnable and SetPend / ClrPend.

For example, being the interrupt # 5 (Exception # 21) not implemented at the hardware level, this could be used as an interrupt / exception of software?

Top replies

Jens Bauer over 11 years ago +2

If I understand the question correctly, you want to create an interrupt service routine (for instance a timer or a DMA-completion routine), which uses an unused interrupt vector in the exception vector...
Joseph Yiu over 11 years ago +1 verified

Hi Carlos, It depends on which processor you are using: In the Cortex-M0, Cortex-M3 and Cortex-M4 processors, a spare interrupt in the middle (e.g. IRQ 0 to 15 implemented, IRQ #5 not used) can still be...
Jens Bauer over 11 years ago in reply to Joseph Yiu +1

I think this is really a cool feature. -I immediately thought of a context-switcher which is normally switched by a timer-interrupt, but can also be switched by a SVCall. Whether or not it's a good idea...