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AXI SLAVE PERIPHERAL

Hi everyone! Please help me.. i have  a project with a custom axi slave  design that  implements multiple memory ranges 256 words each . A master ( my processor in figure) can write burst data to the example slave and read the data back. The problem is that i don't find the API or the instructions  to program the ARM processor inside the zynq 7000 to work in burst mode!

Can someone help me??

thanks!!

Best regards!

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Parents
  • !  i really don't understand how i can use this code in order to program the processor to write and read in write in burst mode according to the AXI protocol? I have a done a project in which i use the axi-lite protocol ( no burst mode), in that case i can use the instrunction u16 Xil_In16 without problem! now which instrunctions i need?

    Thanks a lot

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  • !  i really don't understand how i can use this code in order to program the processor to write and read in write in burst mode according to the AXI protocol? I have a done a project in which i use the axi-lite protocol ( no burst mode), in that case i can use the instrunction u16 Xil_In16 without problem! now which instrunctions i need?

    Thanks a lot

Children
  • The code I have pointed you to contains the APIs that you must call if you want to use the DMA to perform the AXI burst access. Since it is a DMA that is performing the actual transfer and not the processor, you will not be using any Xil_In or Xil_Out. The DMA APIs should be ready for you to use in your Xilinx SDK environment (I can't be of much help as for where exactly you can find them in your Xilinx SDK environment).

    The XDmaPs_Example_W_Intr() function in the code I pointed you to contains example instructions (that you can re-use) for how to configure the DMA to perform the desired burst access, how to start the DMA, how to enable interrupts (they are used by the DMA to signal to the processor that it's finished doing the transfer) and so on.

    So I would suggest that you have a look at the DMA documentation provided by Xilinx along with the Zynq and try to re-use the code that I pointed you to to try some sample burst accesses.

  • Ok thank you very much .. i try to do it, but before it is better if i read the DMA  documentation as suggested you.

    Alternatively someone has suggested me to use the Cortex A9 time functions, but i dont really understand how i can use it, do you know something about it?

    Thank you for the support!!

  • Hmm I am not sure I understand what you mean by time functions. The name reminds me of OS-level functions to measure time intervals, or any sort of timer-related driver, but I fail to see how this could help you in generating AXI burst accesses..

  • Uhmm, yes they are the OS-level functions as  "unsigned int usleep(unsigned int useconds)" "unsigned int sleep(unsigned int _seconds)""void nanosleep(unsigned int nanoseconds)"

    The components of Xilinx forum have suggested me the functions..but i dont know why..

  • In particular, i have done  a project in which i have a slave that can receive  the AXI protocol signal ( for example  S_AXI_AWBURST that indicates the type of burst that

    determine how the address for each transfer within the burst is calculated)  from the processor ( inside Zynq 7000), but the question is : how can i configure the arm in order to generate these signals? Only trough DMA?