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AXI SLAVE PERIPHERAL

Antonio

Hi everyone! Please help me.. i have  a project with a custom axi slave  design that  implements multiple memory ranges 256 words each . A master ( my processor in figure) can write burst data to the example slave and read the data back. The problem is that i don't find the API or the instructions  to program the ARM processor inside the zynq 7000 to work in burst mode!

Can someone help me??

thanks!!

Best regards!

project.PNG
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  • 0 in reply to Antonio

    In particular, i have done  a project in which i have a slave that can receive  the AXI protocol signal ( for example  S_AXI_AWBURST that indicates the type of burst that

    determine how the address for each transfer within the burst is calculated)  from the processor ( inside Zynq 7000), but the question is : how can i configure the arm in order to generate these signals? Only trough DMA?

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  • 0 in reply to Antonio

    In particular, i have done  a project in which i have a slave that can receive  the AXI protocol signal ( for example  S_AXI_AWBURST that indicates the type of burst that

    determine how the address for each transfer within the burst is calculated)  from the processor ( inside Zynq 7000), but the question is : how can i configure the arm in order to generate these signals? Only trough DMA?

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