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AXI SLAVE PERIPHERAL

Hi everyone! Please help me.. i have  a project with a custom axi slave  design that  implements multiple memory ranges 256 words each . A master ( my processor in figure) can write burst data to the example slave and read the data back. The problem is that i don't find the API or the instructions  to program the ARM processor inside the zynq 7000 to work in burst mode!

Can someone help me??

thanks!!

Best regards!

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Parents
  • Ok thank you very much .. i try to do it, but before it is better if i read the DMA  documentation as suggested you.

    Alternatively someone has suggested me to use the Cortex A9 time functions, but i dont really understand how i can use it, do you know something about it?

    Thank you for the support!!

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  • Ok thank you very much .. i try to do it, but before it is better if i read the DMA  documentation as suggested you.

    Alternatively someone has suggested me to use the Cortex A9 time functions, but i dont really understand how i can use it, do you know something about it?

    Thank you for the support!!

Children
  • Hmm I am not sure I understand what you mean by time functions. The name reminds me of OS-level functions to measure time intervals, or any sort of timer-related driver, but I fail to see how this could help you in generating AXI burst accesses..

  • Uhmm, yes they are the OS-level functions as  "unsigned int usleep(unsigned int useconds)" "unsigned int sleep(unsigned int _seconds)""void nanosleep(unsigned int nanoseconds)"

    The components of Xilinx forum have suggested me the functions..but i dont know why..

  • In particular, i have done  a project in which i have a slave that can receive  the AXI protocol signal ( for example  S_AXI_AWBURST that indicates the type of burst that

    determine how the address for each transfer within the burst is calculated)  from the processor ( inside Zynq 7000), but the question is : how can i configure the arm in order to generate these signals? Only trough DMA?