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ARM926ejs Cache linefill

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  • 0 Arm Employee Badge
    Note: This was originally posted on 25th March 2009 at http://forums.arm.com

    > in my system, i really use the write-back mode, i post question using write-though mode only because i want to know exactly what is the meaning of "buffered store to external memory".

    Buffering just means that the core can (probably) proceed with useful work without waiting for the actual write to hit external memory. The actual implementation of buffering varies from core to core - but in most cases there is a  general write buffer for small writes and an optimized write buffer for cache-line evictions. (As you mention at the bottom of your post)

    > Does it mean that when write cahce hit, data first updated in DCache, and then send data to write buffer, and after a little time, we assue it is 1us, the data in write buffer is updated to SDRAM automatically.

    Yes, that sounds right to me. Microarchitectures vary slightly so some systems may issue cache update and external DRAM write in parallel.

    > In my mind, i think write miss should of course do linefill immediately, why doesn't ARM implement this on ARM9? Is it because of cost?

    I suspect so ... the usual arguments for not doing something are related to power, silicon area and meeting cache timing constraints.

    > and in arm11, is this implemented?

    ARM11 MPCore and Cortex-A* cores implement write allocate caches. I'm not sure about the Cortex-R4 - I've never used one :)

    > Does it mean that there are two physical write buffer on ARM9, one is specifically for CPU STR instruction which may write data to SDRAM, and the other is epecifically for DCache?

    Yes. The cache writebuffer is optimized because it only ever has to handle half-line length bursts which are always naturally aligned.
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  • 0 Arm Employee Badge
    Note: This was originally posted on 25th March 2009 at http://forums.arm.com

    > in my system, i really use the write-back mode, i post question using write-though mode only because i want to know exactly what is the meaning of "buffered store to external memory".

    Buffering just means that the core can (probably) proceed with useful work without waiting for the actual write to hit external memory. The actual implementation of buffering varies from core to core - but in most cases there is a  general write buffer for small writes and an optimized write buffer for cache-line evictions. (As you mention at the bottom of your post)

    > Does it mean that when write cahce hit, data first updated in DCache, and then send data to write buffer, and after a little time, we assue it is 1us, the data in write buffer is updated to SDRAM automatically.

    Yes, that sounds right to me. Microarchitectures vary slightly so some systems may issue cache update and external DRAM write in parallel.

    > In my mind, i think write miss should of course do linefill immediately, why doesn't ARM implement this on ARM9? Is it because of cost?

    I suspect so ... the usual arguments for not doing something are related to power, silicon area and meeting cache timing constraints.

    > and in arm11, is this implemented?

    ARM11 MPCore and Cortex-A* cores implement write allocate caches. I'm not sure about the Cortex-R4 - I've never used one :)

    > Does it mean that there are two physical write buffer on ARM9, one is specifically for CPU STR instruction which may write data to SDRAM, and the other is epecifically for DCache?

    Yes. The cache writebuffer is optimized because it only ever has to handle half-line length bursts which are always naturally aligned.
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