We are running a survey to help us improve the experience for all of our members. If you see the survey appear, please take the time to tell us about your experience if you can.
hi,
on a cortex a53, I would like to get the best of both worlds. Having dcache enabled but no page walk in case of a miss.
I want no memory protection because we manage the whole system ( kind of baremetal processes)
Is there a way to tell the mmu controller that we are in identity mapping for the whole memory available, so that a page walk is not triggered?
thanks
I will look into it right now :)