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Servers and Cloud Computing forum
The latest forum discussions about the Arm Servers and Cloud Computing ecosystem for cloud native edit to cloud application development and deployment.
101
questions
RE: ArmRAL: Wrong usage of k0 in LDPC rate matching
6 months ago
SoC Design and Simulation forum
The latest forum discussions for community-based support for System-on-Chip (SoC) and Arm simulation models.
708
questions
RE: In CHI how the Slave side is giving the L-Credits to the Master Side
5 days ago
SystemReady Forum
The SystemReady forum covers all aspects of the Arm SystemReady compliance program, including associated specifications (BSA, SBSA, BBR), Architecture Compliance Suite (ACS) testing, and implementation considerations for pre-silicon and SystemReady bands.
15
questions
RE: How to run ARM ACS
5 months ago
恩智浦汽车电子MCU讨论区博
4
questions
RE: [TRK-KEA64使用经验分享] 开箱体验 亮瞎我的双眼
over 9 years ago
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Not Answered
when I count the cycle of instructions in A53, I just want the cycle not including operation of memory and cache, which performance counts i should remove? thanks a lot！
0
Cortex-A53
Cache
Cortex-A
Memory
9914
views
0
replies
Started
over 6 years ago
by
sam0220
Not Answered
Development Boards for ML Processor
0
machine learning
Neural Network
Internet of Things (IoT)
6671
views
2
replies
Latest
over 6 years ago
by
Jason Andrews
Not Answered
ldr and fmla instruction time consumption issue.
0
19592
views
8
replies
Latest
over 6 years ago
by
arthur_libin
Answered
MMU and Cache configuration
0
Cortex-A5
Cache
Memory Management Unit (MMU)
Cortex-A
23931
views
12
replies
Latest
over 6 years ago
by
Vanhealsing
Answered
Significance of [MS] and [LS] in big-endian data bus in AHB5 Specification
+1
AMBA
AHB5
AMBA 5
AHB
13875
views
1
reply
Latest
over 6 years ago
by
Colin Campbell
Not Answered
Cannot find definition of extern function, reference only
0
Microcontroller (MCU)
2764
views
3
replies
Latest
over 6 years ago
by
Andrew Neil
Not Answered
aarch64 MMU: inconsistency in ARMv8 ARM?
0
logic
Armv8-A
Memory Management Unit (MMU)
Memory Management
14741
views
1
reply
Latest
over 6 years ago
by
Zhifei Yang
Not Answered
Aarch64 - Armv8-a bitwise cyclic shift operation
0
14475
views
1
reply
Latest
over 6 years ago
by
Zhifei Yang
Not Answered
aarch64 Cross compilation error (GLIBCXX_3.4)
0
Toolchain
Cross compiling
Keil
Compiling
GCC
String
Compilation error
GNU
Windows
C
Linux
17601
views
1
reply
Latest
over 6 years ago
by
Zhifei Yang
Answered
how to send data from open cv to arm 7
+1
Arm7
Computer Vision (CV)
4259
views
1
reply
Latest
over 6 years ago
by
Zhifei Yang
Not Answered
Dual emission problem related to neon instruction set on A53
0
19324
views
8
replies
Latest
over 6 years ago
by
姑苏风河
Not Answered
Unable to update firmware on Musca A board
0
Musca-A
13877
views
1
reply
Latest
over 6 years ago
by
Zhifei Yang
Answered
Store data directly in RAM - ARM Cortex A53
+2
12264
views
2
replies
Latest
over 6 years ago
by
Martin Weidmann
Suggested Answer
DBM bit in descriptor
0
14891
views
3
replies
Latest
over 6 years ago
by
42Bastian Schick
Not Answered
undefined reference to posix_memalign
0
Software Development Kit (SDK)
16747
views
1
reply
Latest
over 6 years ago
by
Zhifei Yang
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