AXI4-lite :Wready dependency on Awvalid and Wvalid

No.

When I described a deadlock I meant the master and slave each waiting for the other to do something first.

In the case you are describing, the slave is waiting for the master to assert AWVALID and WVALID, before it asserts WREADY, which is legal. This isn't a deadlock because the master CANNOT also be waiting for the slave to drive WREADY before it asserts AWVALID or WVALID.

If the master did wait for a READY input signal to be asserted before it asserted a VALID output, that would be a clear protocol violation by the master which could lead to this deadlock, but the issue there is that the master design does not comply with the protocol requirements.

Deadlocks cannot occur when the protocol requirements are followed.

No.

When I described a deadlock I meant the master and slave each waiting for the other to do something first.

In the case you are describing, the slave is waiting for the master to assert AWVALID and WVALID, before it asserts WREADY, which is legal. This isn't a deadlock because the master CANNOT also be waiting for the slave to drive WREADY before it asserts AWVALID or WVALID.

If the master did wait for a READY input signal to be asserted before it asserted a VALID output, that would be a clear protocol violation by the master which could lead to this deadlock, but the issue there is that the master design does not comply with the protocol requirements.

Deadlocks cannot occur when the protocol requirements are followed.

Thanks a lot  Colin