1.In AHB except a single transfer inset a wait state in middle of the burst only or insert anywhere in a burst.
2. In INCR burst transfer can i insert a BUSY in a middle of the burst or must insert a last of the burst.
That's the point of an undefined length burst, you DON'T know when the last transfer is until the master issues an IDLE or NONSEQ transfer.
An undefined length burst can end on a BUSY transfer.
A BUSY transfer in an undefined length INCR burst is the master's way of indicating that it thinks it will be performing more transfers in the burst, but isn't yet able to perform that next SEQ access. So it issues a BUSY to stall the system while it decides what to next transfer. It could then be that after signalling one or more BUSY cycles the master realises that it doesn't want to continue with that burst, so BUSY is the final transfer of that burst.